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LCD DRIVER FOR HD44xx

                                    ;***************************************************************************
                                    ;
                                    ; File Name		:'lcd4.asm"
                                    ; Title			:HD44xx kompatibilis LCD Driver (I/O Port)
                                    ; Date			:2003.10.28.
                                    ; Version		:1.0.0
                                    ; Support telephone	:+36-70-333-4034,  old: +36-30-9541-658 VFX
                                    ; Support fax		:
                                    ; Support Email		:info@vfx.hu
                                    ; Target MCU		:ATmega128
                                    ;
                                    ;***************************************************************************
                                    ;	D E S C R I P T I O N
                                    ;
                                    ; http://home.iae.nl/users/pouweha/lcd/lcd.shtml
                                    ;
                                    ; Support 2x16 char LCD
                                    ;
                                    ;***************************************************************************
                                    ;	M O D I F I C A T I O N   H I S T O R Y
                                    ;
                                    ;
                                    ;       rev.      date      who  	why
                                    ;	----	----------  ---		------------------------------------
                                    ;	0.01	2003.10.28  VFX		Creation
                                    ;
                                    ;***************************************************************************
                                    ;Hardware
                                    ;***************************************************************************
                                    ;*
                                    ;*	SYSCLK: f=16.000 MHz (T= 62.5 ns)
                                    ;*
                                    ;***************************************************************************
                                    ;
                                    ;
                                    ;**************************************************************************
                                    ;* Hardware Def.
                                    ;
                                    ;***************************************************************************
                                    
                                    
                                    .equ	LCDRS_PORT=PORTD	;LCD Register Select
                                    .equ	LCDRS_DIR=DDRD		;Register Select 1=data 0=command
                                    .equ	LCDRS=0
                                    
                                    .equ	LCDRW_PORT=PORTD	;LCD Read/Write
                                    .equ	LCDRW_DIR=DDRD		;0=write to display, 1= read from display
                                    .equ	LCDRW=1
                                    
                                    .equ	LCDEN_PORT=PORTD	;LCD Enable
                                    .equ	LCDEN_DIR=DDRD		;Enable - data clocked on falling edge
                                    .equ	LCDEN=4
                                    
                                    .equ	LCDDAT_PORT=PORTF	;LCD Data PortF[3..0]
                                    .equ	LCDDAT_DIR=DDRF
                                    .equ	LCDDAT_PIN=PINF
                                    .equ	LCDDAT_Mask=0b00001111
                                    
                                    
                                    
                                    
                                    ;***************************************************************************
                                    ;**** VARIABLES
                                    .DSEG
                                    
                                    
                                    
                                    ;***************************************************************************
                                    .ESEG
                                    
                                    
                                    ;***************************************************************************
                                    ;**** CODE SEG
                                    ;***************************************************************************
                                    .CSEG
                                    
                                    
                                    ;*****************************************************
                                    ;** Wait1ms
                                    ;**
                                    ;**  In: R16 - 16*1ms varakozas
                                    ;**
                                    ;**  Out: -
                                    ;**
                                    ;**
                                    ;** Alt R16
                                    ;**
                                    ;** Description:  wating for R16 * 1 ms
                                    ;*
                                    Wait1ms:
                                    		ldi	XL,low(SYSCLK/(5*1000))
                                    		ldi	XH,high(SYSCLK/(5*1000))
                                    Waitx1:		sbiw	XL,1		;[2] \
                                    		nop			;[1]  - 5 cycles in loop
                                    		brne	Waitx1		;[2] /
                                    		dec	R16
                                    		brne	Wait1ms
                                    		ret
                                    
                                    
                                    
                                    
                                    ;*****************************************************
                                    ;** LCD_pulseE
                                    ;**
                                    ;**  In: - 
                                    ;**
                                    ;**  Out: R0 - Data on LCDDat pin
                                    ;**
                                    ;**
                                    ;** Alt 
                                    ;**
                                    ;** Description:  Generate ENABLE signal to LCD
                                    ;*
                                    LCD_pulseE:
                                    		sbi	LCDEN_PORT,LCDEN	;Enable high
                                    		nop				;Wait 500ns @16MHz
                                    		nop
                                    		nop
                                    		nop
                                    		nop
                                    		nop
                                    		nop
                                    		nop
                                    		in	R0,LCDDAT_PIN
                                    		cbi	LCDEN_PORT,LCDEN	;Enable low, latch data
                                    		ret
                                    
                                    
                                    
                                    ;*****************************************************
                                    ;** LCD_Init
                                    ;**
                                    ;**  In: -
                                    ;**
                                    ;**  Out: -
                                    ;**
                                    ;**
                                    ;** Alt: 
                                    ;**
                                    ;** Description:  Initialize LCD in 4 bit mode
                                    ;*
                                    LCD_Init:
                                    		sbi	LCDEN_DIR,LCDEN		;LCD I/O Disabled
                                    		cbi	LCDEN_PORT,LCDEN
                                    
                                    
                                    		sbi	LCDRS_DIR,LCDRS		;Sel. LCD Command Register
                                    		cbi	LCDRS_PORT,LCDRS
                                    
                                    		sbi	LCDRW_DIR,LCDRW		;LCD Write mode
                                    		cbi	LCDRW_PORT,LCDRW
                                    
                                    		ldi	R16,LCDDAT_Mask		;LCD Data lines outputs
                                    		sts	LCDDAT_DIR,R16
                                    		ldi	R16,0			;All zeros
                                    		sts	LCDDAT_PORT,R16
                                    
                                    		ldi	R16,15			;Wait at least 15msec after
                                    		rcall	Wait1ms			;powerup before writing to display
                                    						;tuti ami tuti legyen 250ms
                                    
                                    		
                                    		; Put the LCD in 8-bit mode.  Even though we want the display to
                                    		; operate in 4-bit mode, the only way to guarantee that our commands
                                    		; are aligned properly is to initialize in 8-bit.  (The user might have
                                    		; hit reset between nibbles of a dual 4-bit cycle.)
                                    
                                    		lds	R16,LCDDAT_PORT
                                    		andi	R16,255-LCDDAT_PORT
                                    		ori	R16,0b00000011		;3x probalkozunk 8 bit mode-ba rakni
                                    		sts	LCDDAT_PORT,R16
                                    		nop
                                    		nop
                                    		cbi	LCDRS_PORT,LCDRS	;Set to Command Reg.
                                    		cbi	LCDRW_PORT,LCDRW	;read
                                    		rcall	LCD_pulseE		;1
                                    		ldi	R16,15
                                    		rcall	Wait1ms			;wait 5ms
                                    
                                    		cbi	LCDRS_PORT,LCDRS	;Set to Command Reg.
                                    		cbi	LCDRW_PORT,LCDRW	;read
                                    		rcall	LCD_pulseE		;2
                                    		ldi	R16,5
                                    		rcall	Wait1ms			;wait 5ms
                                    
                                    		cbi	LCDRS_PORT,LCDRS	;Set to Command Reg.
                                    		cbi	LCDRW_PORT,LCDRW	;read
                                    		rcall	LCD_pulseE		;3
                                    		ldi	R16,5
                                    		rcall	Wait1ms			;wait 5ms
                                    		
                                    		; Now it's safe to go into 4-bit mode.
                                    
                                    		lds	R16,LCDDAT_PORT
                                    		andi	R16,255-LCDDAT_PORT
                                    		ori	R16,0b00000010		;4bit bus mode
                                    		sts	LCDDAT_PORT,R16
                                    		rcall	LCD_pulseE
                                    		ldi	R16,5
                                    		rcall	Wait1ms			;wait 5ms
                                    
                                    
                                    		; *** Send the 'FUNCTION SET' command
                                    		;                +------ Data:  0 = 4-bit; 1 = 8-bit
                                    		;                |+----- Lines: 0 = 1; 1 = 2
                                    		;   	         ||+---- Font:  0 = 5x8; 1 = 5x11
                                    		ldi	R16,0b00101000
                                    		rcall	LCD_SendCmd
                                    	
                                    		; *** Send the 'CURSOR/DISPLAY SHIFT' command
                                    		;                 +----- S/C:  0 = cursor; 1 = display
                                    		;    	          |+---- R/L:  0 = left; 1 = right
                                    		ldi	R16,0b00010100
                                    		rcall	LCD_SendCmd
                                    
                                    		; *** Send the 'ENTRY MODE' command
                                    		;      		    +--- Direction: 0 = left; 1 = right
                                    		;  	            |+-- Shift Dislay: 0 = off; 1 = on
                                    		ldi	R16,0b00000110
                                    		rcall	LCD_SendCmd
                                    
                                    		; *** Send the 'DISPLAY ON/OFF' command
                                    		;     		   +---- Display: 0 = off; 1 = on
                                    		;     		   |+--- Cursor: 0 = off; 1 = on
                                    		;     		   ||+-- Blink: 0 = off; 1 = on
                                    		ldi	R16,0b00001100
                                    		rcall	LCD_SendCmd
                                    
                                    		rcall	LCD_Clear
                                    		ret
                                    
                                    
                                    ;*****************************************************
                                    ;** LCD_Clear
                                    ;**
                                    ;**  In: -
                                    ;**
                                    ;**  Out: -
                                    ;**
                                    ;**
                                    ;** Alt: 
                                    ;**
                                    ;** Description:
                                    ;** Clears the display and sends the cursor home.
                                    ;
                                    LCD_Clear:
                                    		ldi	R16,0b00000001		;Clear LCD
                                    		rcall	LCD_SendCmd
                                    		ldi	R16,0b00000010		;Send the cursor home
                                    		rcall	LCD_SendCmd
                                    		ret
                                    
                                    ;*****************************************************
                                    ;** LCD_WaitBusy
                                    ;**
                                    ;**  In: -
                                    ;**
                                    ;**  Out: -
                                    ;**
                                    ;**
                                    ;** Alt: R0, R16
                                    ;**
                                    ;** Description:
                                    ;** Waits for the busy flag to go low.  Since we're in 4-bit mode,
                                    ;** the register has to be read twice (for a total of 8 bits).
                                    ;*
                                    LCD_WaitBusy:
                                    		push	R16
                                    
                                    		lds	R16,LCDDAT_DIR
                                    		andi	R16,255-LCDDAT_Mask	;LCD data bits going to input
                                    		sts	LCDDAT_DIR,R16
                                    
                                    		lds	R16,LCDDAT_PORT
                                    		ori	R16,LCDDAT_Mask		;pull-up
                                    		sts	LCDDAT_PORT,R16
                                    		rjmp	LCDWait1
                                    
                                    LCDWait0:
                                    		ldi	R16,2			;Wait min. ~1us
                                    LCDWait01:	nop
                                    		dec	R16
                                    		brne	LCDWait01
                                    LCDWait1:
                                    		cbi	LCDRS_PORT,LCDRS	;Set to Command Reg.
                                    		sbi	LCDRW_PORT,LCDRW	;read
                                    		rcall	LCD_pulseE		;Busy Flag read bit 7.
                                    		mov	R16,R0
                                    		rcall	LCD_pulseE		;lower nibble must read
                                    		sbrc	R16,3			;Check busy flag
                                    		 rjmp	LCDWait0
                                    
                                    
                                    		lds	R16,LCDDAT_DIR		;LCD Data lines outputs
                                    		ori	R16,LCDDAT_Mask
                                    		sts	LCDDAT_DIR,R16
                                    		lds	R16,LCDDAT_PORT
                                    		andi	R16,255-LCDDAT_Mask	;All zero
                                    		sts	LCDDAT_PORT,R16
                                    		pop	R16
                                    		ret
                                    
                                    
                                    ;*****************************************************
                                    ;** LCD_SendCmd
                                    ;**
                                    ;**  In: R16 - Command byte
                                    ;**
                                    ;**  Out: -
                                    ;**
                                    ;**
                                    ;** Alt: R0, R1, R16, R17
                                    ;**
                                    ;** Description:
                                    ;** Routine to write a command to the instruction register.
                                    ;
                                    LCD_SendCmd:
                                    		rcall	LCD_WaitBusy
                                    		mov	R1,R16
                                    		swap	R16
                                    		andi	R16,LCDDAT_Mask		;send upper nibble first
                                    		lds	R17,LCDDAT_PORT
                                    		andi	R17,255-LCDDAT_Mask
                                    		or	R17,R16
                                    		sts	LCDDAT_PORT,R17
                                    		cbi	LCDRS_PORT,LCDRS	;Set to Command Reg.
                                    		cbi	LCDRW_PORT,LCDRW	;Write
                                    		rcall	LCD_PulseE		;Latch upper nibble
                                    
                                    		mov	R16,R1
                                    		andi	R16,LCDDAT_Mask		;send lower nibble
                                    		lds	R17,LCDDAT_PORT
                                    		andi	R17,255-LCDDAT_Mask
                                    		or	R17,R16
                                    		sts	LCDDAT_PORT,R17
                                    		cbi	LCDRS_PORT,LCDRS	;Set to Command Reg.
                                    		cbi	LCDRW_PORT,LCDRW	;Write
                                    		rcall	LCD_PulseE		;Latch lower nibble
                                    		ret
                                    
                                    
                                    ;*****************************************************
                                    ;** LCD_SendChar
                                    ;**
                                    ;**  In: R16 - character code
                                    ;**
                                    ;**  Out: -
                                    ;**
                                    ;**
                                    ;** Alt: R0,R1, R16, R17
                                    ;**
                                    ;** Description:
                                    ;** Routine to write a character to the data register.
                                    ;
                                    LCD_SendChar:
                                    		rcall	LCD_WaitBusy
                                    		mov	R1,R16
                                    		swap	R16
                                    		andi	R16,LCDDAT_Mask		;send upper nibble first
                                    		lds	R17,LCDDAT_PORT
                                    		andi	R17,255-LCDDAT_Mask
                                    		or	R17,R16
                                    		sts	LCDDAT_PORT,R17
                                    		sbi	LCDRS_PORT,LCDRS	;Set to data Reg.
                                    		cbi	LCDRW_PORT,LCDRW	;Write
                                    		rcall	LCD_PulseE		;Latch upper nibble
                                    		mov	R16,R1
                                    		andi	R16,LCDDAT_Mask		;send lower nibble
                                    		lds	R17,LCDDAT_PORT
                                    		andi	R17,255-LCDDAT_Mask
                                    		or	R17,R16
                                    		sts	LCDDAT_PORT,R17
                                    		sbi	LCDRS_PORT,LCDRS	;Set to Data Reg.
                                    		cbi	LCDRW_PORT,LCDRW	;Write
                                    		rcall	LCD_PulseE		;Latch lower nibble
                                    		ret
                                    
                                    
                                    ;*****************************************************
                                    ;** LCD_Goto
                                    ;**
                                    ;**  In: R16 - position
                                    ;**		0x00 - 1.row, 1.col
                                    ;**		0x40 - 1.row, 2.col
                                    ;**
                                    ;**  Out: -
                                    ;**
                                    ;**
                                    ;** Alt: R0, R1, R16, R17
                                    ;**
                                    ;** Description:
                                    ;** 
                                    ;
                                    LCD_Goto:
                                    		ori	R16,0b10000000		;Set address Command
                                    		rcall	LCD_SendCmd
                                    		ret
                                    
                                    
                                    ;*****************************************************
                                    ;** LCD_PrnFLASHStr
                                    ;**
                                    ;**  In: Z+RAMP - start address of string
                                    ;**
                                    ;**  Out: -
                                    ;**
                                    ;**
                                    ;** Alt: R0, R1, R16, R17
                                    ;**
                                    ;** Description:
                                    ;** Print a null terminated string to LCD
                                    ;
                                    LCD_PrnFLASHStr:
                                    		elpm	R16,Z+
                                    		tst	R16
                                    		breq	LCD_PrnFLSH0
                                    		rcall	LCD_SendChar
                                    		rjmp	LCD_PrnFLASHStr
                                    LCD_PrnFLSH0:
                                    		ret
                                    
                                    
                                    
                                 

Programming the AVR Microcontrollers in Assember Machine Language

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Atmel AVR From Wikipedia, the free encyclopedia (Redirected from Avr) Jump to: navigation, search The AVRs are a family of RISC microcontrollers from Atmel. Their internal architecture was conceived by two students: Alf-Egil Bogen and Vegard Wollan, at the Norwegian Institute of Technology (NTH] and further developed at Atmel Norway, a subsidiary founded by the two architects. Atmel recently released the Atmel AVR32 line of microcontrollers. These are 32-bit RISC devices featuring SIMD and DSP instructions, along with many additional features for audio and video processing, intended to compete with ARM based processors. Note that the use of "AVR" in this article refers to the 8-bit RISC line of Atmel AVR Microcontrollers. The acronym AVR has been reported to stand for Advanced Virtual RISC. It's also rumoured to stand for the company's founders: Alf and Vegard, who are evasive when questioned about it. Contents [hide] 1 Device Overview 1.1 Program Memory 1.2 Data Memory and Registers 1.3 EEPROM 1.4 Program Execution 1.5 Speed 2 Development 3 Features 4 Footnotes 5 See also 6 External Links 6.1 Atmel Official Links 6.2 AVR Forums & Discussion Groups 6.3 Machine Language Development 6.4 C Language Development 6.5 BASIC & Other AVR Languages 6.6 AVR Butterfly Specific 6.7 Other AVR Links [edit] Device Overview The AVR is a Harvard architecture machine with programs and data stored and addressed separately. Flash, EEPROM, and SRAM are all integrated onto a single die, removing the need for external memory (though still available on some devices). [edit] Program Memory Program instructions are stored in semi-permanent Flash memory. Each instruction for the AVR line is either 16 or 32 bits in length. The Flash memory is addressed using 16 bit word sizes. The size of the program memory is indicated in the naming of the device itself. For instance, the ATmega64x line has 64Kbytes of Flash. Almost all AVR devices are self-programmable. [edit] Data Memory and Registers The data address space consists of the register file, I/O registers, and SRAM. The AVRs have thirty-two single-byte registers and are classified as 8-bit RISC devices. The working registers are mapped in as the first thirty-two memory spaces (000016-001F16) followed by the 64 I/O registers (002016-005F16). The actual usable RAM starts after both these sections (address 006016). (Note that the I/O register space may be larger on some more extensive devices, in which case memory mapped I/O registers will occupy a portion of the SRAM.) Even though there are separate addressing schemes and optimized opcodes for register file and I/O register access, all can still be addressed and manipulated as if they were in SRAM. [edit] EEPROM Almost all devices have on-die EEPROM. This is most often used for long-term parameter storage to be retrieved even after cycling the power of the device. [edit] Program Execution Atmel's AVRs have a single level pipeline design. The next machine instruction is fetched as the current one is executing. Most instructions take just one or two clock cycles, making AVRs relatively fast among the eight-bit microcontrollers. The AVR family of processors were designed for the efficient execution of compiled C code. The AVR instruction set is more orthogonal than most eight-bit microcontrollers, however, it is not completely regular: Pointer registers X, Y, and Z have addressing capabilities that are different from each other. Register locations R0 to R15 have different addressing capabilities than register locations R16 to R31. I/O ports 0 to 31 have different addressing capabilities than I/O ports 32 to 63. CLR affects flags, while SER does not, even though they are complementary instructions. CLR set all bits to zero and SER sets them to one. (Note though, that neither CLR nor SER are native instructions. Instead CLR is syntactic sugar for [produces the same machine code as] EOR R,R while SER is syntactic sugar for LDI R,$FF. Math operations such as EOR modify flags while moves/loads/stores/branches such as LDI do not.) [edit] Speed The AVR line can normally support clock speeds from 0-16MHz, with some devices reaching 20MHz. Lower powered operation usually requires a reduced clock speed. All AVRs feature an on-chip oscillator, removing the need for external clocks or resonator circuitry. Because many operations on the AVR are single cycle, the AVR can achieve up to 1MIPS per MHz. [edit] Development AVRs have a large following due to the free and inexpensive development tools available, including reasonably priced development boards and free development software. The AVRs are marketed under various names that share the same basic core but with different peripheral and memory combinations. Some models (notably, the ATmega range) have additional instructions to make arithmetic faster. Compatibility amongst chips is fairly good. See external links for sites relating to AVR development. [edit] Features Current AVRs offer a wide range of features: RISC Core Running Many Single Cycle Instructions Multifunction, Bi-directional I/O Ports with Internal, Configurable Pull-up Resistors Multiple Internal Oscillators Internal, Self-Programmable Instruction Flash Memory up to 256K In-System Programmable using ICSP, JTAG, or High Voltage methods Optional Boot Code Section with Independent Lock Bits for Protection Internal Data EEPROM up to 4KB Internal SRAM up to 8K 8-Bit and 16-Bit Timers PWM Channels & dead time generator Lighting (PWM Specific) Controller models Dedicated I²C Compatible Two-Wire Interface (TWI) Synchronous/Asynchronous Serial Peripherals (UART/USART) (As used with RS-232,RS-485, and more) Serial Peripheral Interface (SPI) CAN Controller Support USB Controller Support Proper High-speed hardware & Hub controller with embedded AVR. Also freely available low-speed (HID) software emulation Ethernet Controller Support Universal Serial Interface (USI) for Two or Three-Wire Synchronous Data Transfer Analog Comparators LCD Controller Support 10-Bit A/D Converters, with multiplex of up to 16 channels Brownout Detection Watchdog Timer (WDT) Low-voltage Devices Operating Down to 1.8v Multiple Power-Saving Sleep Modes picoPower Devices Atmel AVR assembler programming language Atmel AVR machine programming language Atmel AVR From Wikipedia, the free encyclopedia (Redirected from Avr) Jump to: navigation, search The AVRs are a family of RISC microcontrollers from Atmel. Their internal architecture was conceived by two students: Alf-Egil Bogen and Vegard Wollan, at the Norwegian Institute of Technology (NTH] and further developed at Atmel Norway, a subsidiary founded by the two architects. Atmel recently released the Atmel AVR32 line of microcontrollers. These are 32-bit RISC devices featuring SIMD and DSP instructions, along with many additional features for audio and video processing, intended to compete with ARM based processors. Note that the use of "AVR" in this article refers to the 8-bit RISC line of Atmel AVR Microcontrollers. The acronym AVR has been reported to stand for Advanced Virtual RISC. It's also rumoured to stand for the company's founders: Alf and Vegard, who are evasive when questioned about it. Contents [hide] 1 Device Overview 1.1 Program Memory 1.2 Data Memory and Registers 1.3 EEPROM 1.4 Program Execution 1.5 Speed 2 Development 3 Features 4 Footnotes 5 See also 6 External Links 6.1 Atmel Official Links 6.2 AVR Forums & Discussion Groups 6.3 Machine Language Development 6.4 C Language Development 6.5 BASIC & Other AVR Languages 6.6 AVR Butterfly Specific 6.7 Other AVR Links [edit] Device Overview The AVR is a Harvard architecture machine with programs and data stored and addressed separately. Flash, EEPROM, and SRAM are all integrated onto a single die, removing the need for external memory (though still available on some devices). [edit] Program Memory Program instructions are stored in semi-permanent Flash memory. Each instruction for the AVR line is either 16 or 32 bits in length. The Flash memory is addressed using 16 bit word sizes. The size of the program memory is indicated in the naming of the device itself. For instance, the ATmega64x line has 64Kbytes of Flash. Almost all AVR devices are self-programmable. [edit] Data Memory and Registers The data address space consists of the register file, I/O registers, and SRAM. The AVRs have thirty-two single-byte registers and are classified as 8-bit RISC devices. The working registers are mapped in as the first thirty-two memory spaces (000016-001F16) followed by the 64 I/O registers (002016-005F16). The actual usable RAM starts after both these sections (address 006016). (Note that the I/O register space may be larger on some more extensive devices, in which case memory mapped I/O registers will occupy a portion of the SRAM.) Even though there are separate addressing schemes and optimized opcodes for register file and I/O register access, all can still be addressed and manipulated as if they were in SRAM. [edit] EEPROM Almost all devices have on-die EEPROM. This is most often used for long-term parameter storage to be retrieved even after cycling the power of the device. [edit] Program Execution Atmel's AVRs have a single level pipeline design. The next machine instruction is fetched as the current one is executing. Most instructions take just one or two clock cycles, making AVRs relatively fast among the eight-bit microcontrollers. The AVR family of processors were designed for the efficient execution of compiled C code. The AVR instruction set is more orthogonal than most eight-bit microcontrollers, however, it is not completely regular: Pointer registers X, Y, and Z have addressing capabilities that are different from each other. Register locations R0 to R15 have different addressing capabilities than register locations R16 to R31. I/O ports 0 to 31 have different addressing capabilities than I/O ports 32 to 63. CLR affects flags, while SER does not, even though they are complementary instructions. CLR set all bits to zero and SER sets them to one. (Note though, that neither CLR nor SER are native instructions. Instead CLR is syntactic sugar for [produces the same machine code as] EOR R,R while SER is syntactic sugar for LDI R,$FF. Math operations such as EOR modify flags while moves/loads/stores/branches such as LDI do not.) [edit] Speed The AVR line can normally support clock speeds from 0-16MHz, with some devices reaching 20MHz. Lower powered operation usually requires a reduced clock speed. All AVRs feature an on-chip oscillator, removing the need for external clocks or resonator circuitry. Because many operations on the AVR are single cycle, the AVR can achieve up to 1MIPS per MHz. [edit] Development AVRs have a large following due to the free and inexpensive development tools available, including reasonably priced development boards and free development software. The AVRs are marketed under various names that share the same basic core but with different peripheral and memory combinations. Some models (notably, the ATmega range) have additional instructions to make arithmetic faster. Compatibility amongst chips is fairly good. See external links for sites relating to AVR development. [edit] Features Current AVRs offer a wide range of features: RISC Core Running Many Single Cycle Instructions Multifunction, Bi-directional I/O Ports with Internal, Configurable Pull-up Resistors Multiple Internal Oscillators Internal, Self-Programmable Instruction Flash Memory up to 256K In-System Programmable using ICSP, JTAG, or High Voltage methods Optional Boot Code Section with Independent Lock Bits for Protection Internal Data EEPROM up to 4KB Internal SRAM up to 8K 8-Bit and 16-Bit Timers PWM Channels & dead time generator Lighting (PWM Specific) Controller models Dedicated I²C Compatible Two-Wire Interface (TWI) Synchronous/Asynchronous Serial Peripherals (UART/USART) (As used with RS-232,RS-485, and more) Serial Peripheral Interface (SPI) CAN Controller Support USB Controller Support Proper High-speed hardware & Hub controller with embedded AVR. Also freely available low-speed (HID) software emulation Ethernet Controller Support Universal Serial Interface (USI) for Two or Three-Wire Synchronous Data Transfer Analog Comparators LCD Controller Support 10-Bit A/D Converters, with multiplex of up to 16 channels Brownout Detection Watchdog Timer (WDT) Low-voltage Devices Operating Down to 1.8v Multiple Power-Saving Sleep Modes picoPower Devices Atmel AVR assembler programming language Atmel AVR machine programming language Atmel AVR From Wikipedia, the free encyclopedia (Redirected from Avr) Jump to: navigation, search The AVRs are a family of RISC microcontrollers from Atmel. Their internal architecture was conceived by two students: Alf-Egil Bogen and Vegard Wollan, at the Norwegian Institute of Technology (NTH] and further developed at Atmel Norway, a subsidiary founded by the two architects. Atmel recently released the Atmel AVR32 line of microcontrollers. These are 32-bit RISC devices featuring SIMD and DSP instructions, along with many additional features for audio and video processing, intended to compete with ARM based processors. Note that the use of "AVR" in this article refers to the 8-bit RISC line of Atmel AVR Microcontrollers. The acronym AVR has been reported to stand for Advanced Virtual RISC. It's also rumoured to stand for the company's founders: Alf and Vegard, who are evasive when questioned about it. Contents [hide] 1 Device Overview 1.1 Program Memory 1.2 Data Memory and Registers 1.3 EEPROM 1.4 Program Execution 1.5 Speed 2 Development 3 Features 4 Footnotes 5 See also 6 External Links 6.1 Atmel Official Links 6.2 AVR Forums & Discussion Groups 6.3 Machine Language Development 6.4 C Language Development 6.5 BASIC & Other AVR Languages 6.6 AVR Butterfly Specific 6.7 Other AVR Links [edit] Device Overview The AVR is a Harvard architecture machine with programs and data stored and addressed separately. Flash, EEPROM, and SRAM are all integrated onto a single die, removing the need for external memory (though still available on some devices). [edit] Program Memory Program instructions are stored in semi-permanent Flash memory. Each instruction for the AVR line is either 16 or 32 bits in length. The Flash memory is addressed using 16 bit word sizes. The size of the program memory is indicated in the naming of the device itself. For instance, the ATmega64x line has 64Kbytes of Flash. Almost all AVR devices are self-programmable. [edit] Data Memory and Registers The data address space consists of the register file, I/O registers, and SRAM. The AVRs have thirty-two single-byte registers and are classified as 8-bit RISC devices. The working registers are mapped in as the first thirty-two memory spaces (000016-001F16) followed by the 64 I/O registers (002016-005F16). The actual usable RAM starts after both these sections (address 006016). (Note that the I/O register space may be larger on some more extensive devices, in which case memory mapped I/O registers will occupy a portion of the SRAM.) Even though there are separate addressing schemes and optimized opcodes for register file and I/O register access, all can still be addressed and manipulated as if they were in SRAM. [edit] EEPROM Almost all devices have on-die EEPROM. This is most often used for long-term parameter storage to be retrieved even after cycling the power of the device. [edit] Program Execution Atmel's AVRs have a single level pipeline design. The next machine instruction is fetched as the current one is executing. Most instructions take just one or two clock cycles, making AVRs relatively fast among the eight-bit microcontrollers. The AVR family of processors were designed for the efficient execution of compiled C code. The AVR instruction set is more orthogonal than most eight-bit microcontrollers, however, it is not completely regular: Pointer registers X, Y, and Z have addressing capabilities that are different from each other. Register locations R0 to R15 have different addressing capabilities than register locations R16 to R31. I/O ports 0 to 31 have different addressing capabilities than I/O ports 32 to 63. CLR affects flags, while SER does not, even though they are complementary instructions. CLR set all bits to zero and SER sets them to one. (Note though, that neither CLR nor SER are native instructions. Instead CLR is syntactic sugar for [produces the same machine code as] EOR R,R while SER is syntactic sugar for LDI R,$FF. Math operations such as EOR modify flags while moves/loads/stores/branches such as LDI do not.) [edit] Speed The AVR line can normally support clock speeds from 0-16MHz, with some devices reaching 20MHz. Lower powered operation usually requires a reduced clock speed. All AVRs feature an on-chip oscillator, removing the need for external clocks or resonator circuitry. Because many operations on the AVR are single cycle, the AVR can achieve up to 1MIPS per MHz. [edit] Development AVRs have a large following due to the free and inexpensive development tools available, including reasonably priced development boards and free development software. The AVRs are marketed under various names that share the same basic core but with different peripheral and memory combinations. Some models (notably, the ATmega range) have additional instructions to make arithmetic faster. Compatibility amongst chips is fairly good. See external links for sites relating to AVR development. [edit] Features Current AVRs offer a wide range of features: RISC Core Running Many Single Cycle Instructions Multifunction, Bi-directional I/O Ports with Internal, Configurable Pull-up Resistors Multiple Internal Oscillators Internal, Self-Programmable Instruction Flash Memory up to 256K In-System Programmable using ICSP, JTAG, or High Voltage methods Optional Boot Code Section with Independent Lock Bits for Protection Internal Data EEPROM up to 4KB Internal SRAM up to 8K 8-Bit and 16-Bit Timers PWM Channels & dead time generator Lighting (PWM Specific) Controller models Dedicated I²C Compatible Two-Wire Interface (TWI) Synchronous/Asynchronous Serial Peripherals (UART/USART) (As used with RS-232,RS-485, and more) Serial Peripheral Interface (SPI) CAN Controller Support USB Controller Support Proper High-speed hardware & Hub controller with embedded AVR. Also freely available low-speed (HID) software emulation Ethernet Controller Support Universal Serial Interface (USI) for Two or Three-Wire Synchronous Data Transfer Analog Comparators LCD Controller Support 10-Bit A/D Converters, with multiplex of up to 16 channels Brownout Detection Watchdog Timer (WDT) Low-voltage Devices Operating Down to 1.8v Multiple Power-Saving Sleep Modes picoPower Devices Atmel AVR assembler programming language Atmel AVR machine programming language