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DALLAS 1 WIRE PROTOCOL

                                    ;***********************************************************************
                                    ;*
                                    ;* Number		:Dallas 1-wire
                                    ;* File Name		:"ds1wire.asm"
                                    ;* Title		:Dallas 1-wire rutinok
                                    ;* Date	 		:2000.10.15.
                                    ;* Version 		:0.0
                                    ;* Support telephone	:+36-70-333-4034,  Old: +36-30-9541-658
                                    ;* Support fax		:
                                    ;* Support E-mail	:info@vfx.hu
                                    ;* Target MCU		:AVR
                                    ;*
                                    ;**************************************************************************
                                    ;* DESCRIPTION
                                    ;*  - DS1990A security unit
                                    ;*
                                    ;*	SYSCLK=3686400 Hz (T=271.267 ns)
                                    ;*
                                    ;* DS119A - Family Code (0x01)
                                    ;*	    48-bit Serial Number
                                    ;*	    8-bit CRC
                                    ;*
                                    ;*
                                    ;**************************************************************************
                                    ;* Hardware Def.
                                    
                                    .EQU	DS1wire_PORT =PORTB	;Dallas 1-Wire bus
                                    .equ	DS1wire_DIR = DDRB
                                    .equ	DS1wire_PIN = PINB
                                    .EQU	DS1wire = 0
                                    
                                    
                                    
                                    .equ	DSReadROM	= 0x33
                                    .equ	DSMatchROM	= 0x55
                                    .equ	DSSkipROM	= 0xCC
                                    .equ	DSSearchROM	= 0xF0
                                    .equ	DSAlarmSearch	= 0xEC
                                    .equ	DSWriteScratchpad= 0x4E
                                    .equ	DSReadScratchpad = 0xBE
                                    .equ	DSCopyScratchpad = 0x48
                                    .equ	DSConvertTemp	= 0x44
                                    .equ	DSRecall	= 0xB8
                                    
                                    
                                    .equ	DSDev1990A	= 0x01
                                    .equ	DSDev1920	= 0x10
                                    
                                    
                                    ;******************************************************************************
                                    ;**** VARIABLES
                                    .DSEG
                                    CRC:	.BYTE	1		;DS1990A CRC GENERATOR HASZNALJA
                                    DSRD:	.BYTE	9		;Ide olvassa be a DS Chipet
                                    DSRDMem:.byte	9		;Scrach Pad tartalma
                                    BadCRC:	.BYTE	1		;Bad CRC szamlalo
                                    
                                    
                                    ;*****************************************************************************
                                    .CSEG
                                    
                                    
                                    
                                    
                                    ;************************************************************************
                                    ;*********************** 1-Wire Bus *************************************
                                    ;************************************************************************
                                    
                                    DS1Wire_Init:
                                    		clr	R16,
                                    		sts	CRC,R16
                                    		sts	BadCRC,R16
                                    
                                    		cbi	DS1wire_PORT,DS1wire
                                    		cbi	DS1wire_DIR,DS1wire
                                    		ret
                                    
                                    
                                    ;*******************************************************************************
                                    ;****** T O U C H R E S E T
                                    ;*******************************************************************************
                                    ;
                                    ;Inicialization procedure "Reset and PreSence Pulses"
                                    ;
                                    ; Ez a rutin egy Reset jelet general a mikrovrzerlo ketiranyu DS_BIT nevu laban,
                                    ;a Touch Memory fele es figyeli a visszajovo PreSence jelet.
                                    ;Ha a PreSence jel megerkezett, akkor C=1 kulonben C=0 (nincs eszkoz a buszon)
                                    ;
                                    ;                              |-Master Rx "Presence Pulse"-|
                                    ;  |---Master Reset Tx Pulse---| |----t(RSTH)---------------|
                                    ; __         t(RSTL)             _____          _____ \\ ___
                                    ;   \                           /     \        /            \
                                    ;    \_________________________/       \______/               \__ ...
                                    ;                               |-----|-------|
                                    ;                                t(PDH) t(PDL)
                                    ;                     t(R) <-- |-|
                                    ;
                                    ;	480us<=t(RSTL)< . t(RSTL)+t(R)<960us
                                    ;	480us<=t(RSTH)<
                                    ;	15us<=t(PDH)<=60us
                                    ;	60us<=t(PDL)<=240us
                                    ;
                                    ; C-flag = 1 DS1990A a buszon van
                                    ;	 = 0 DS1990A nincs a buszon
                                    ;
                                    ; R16, X
                                    
                                    TouchReset:
                                    
                                    	SBI	DS1wire_DIR,DS1wire		;   1-wire = Master LOW , Start the reset pulse
                                    	ldi	YL,low((480*SYSCLK)/(1000000*4))
                                    	ldi	YH,high((480*SYSCLK)/(1000000*4));loop cycle = 4
                                    TR0:	sbiw	YL,1				;[2]
                                    	brne	TR0  				;[1/2] 480us wait with data low
                                    
                                    
                                    
                                    
                                    
                                    	SBI	DS1wire_PORT,DS1wire		;[2]   1-wire =Active Hi
                                    	nop					;[1]
                                    	nop
                                    	CBI	DS1wire_DIR,DS1wire		;[2]   1-wire HI (felengedve)
                                    	CBI	DS1wire_PORT,DS1wire		;[2]   1-wire = Tri-state
                                    	nop					;[1]
                                    	nop
                                    
                                    	SBIS	DS1wire_PIN,DS1wire		;[1/2]
                                    	 RJMP	Short				;[2]    ha egybol Low az rossz
                                    
                                    
                                    	ldi	YL,low((60*SYSCLK)/(1000000*6))
                                    	ldi	YH,high((60*SYSCLK)/(1000000*6));loop cycle = 6
                                    TR1:	SBIS	DS1wire_PIN,DS1wire		;[1/2]
                                    	 RJMP	WL				;[2]    Exit loop if line low
                                    	sbiw	YL,1 				;[2]
                                    	BRNE	TR1  				;[1/2] 60 us wait with data low
                                    	RJMP	SHORT				;[2]   Line could not go low
                                    
                                    WL:
                                    	ldi	YL,low((240*SYSCLK)/(1000000*6))
                                    	ldi	YH,high((240*SYSCLK)/(1000000*6));loop cycle = 6
                                    TR3:	SBIC	DS1wire_PIN,DS1wire		;[1/2]
                                    	 RJMP	WH				;[2]    Exit loop if line hi
                                    	sbiw	YL,1 				;[2]
                                    	BRNE	TR3  				;[1/2] us wait with data low
                                    
                                    SHORT:	CLC					;[1] Error
                                    	RET					;[4]
                                    
                                    WH:
                                    	ldi	YL,low((480*SYSCLK)/(1000000*4))
                                    	ldi	YH,high((480*SYSCLK)/(1000000*4))
                                    TR4:	sbiw	YL,1 				;[2]
                                    	BRNE	TR4  				;[1/2] us wait with data low
                                    
                                    	SEC					;[1] RESET OK.
                                    	RET					;[4]
                                    
                                    
                                    
                                    ;****************************************************************************
                                    ;******* TOUCHBYTE
                                    ;****************************************************************************
                                    ;R0-ban megadott byte-ot kikuldi a touchmemory-nak
                                    ;es szimultan beolvas egy byte-ot onnan az R1-be
                                    ;Hasznalja a R17, R16 R3, R2, X
                                    ;
                                    
                                    TouchByte:
                                    	LDI	R17,8             		;[1]
                                    BIT_LOOP:
                                    	ROR	R1				;[1]
                                    	RCALL	TOUCHBIT			;[3]
                                    	ROR	R0				;[1]
                                    	DEC	R17				;[1]
                                    	BRNE	BIT_LOOP			;[1/2]
                                    	RET					;[1]
                                    
                                    TOUCHBIT:
                                    	sbi	DS1wire_DIR,DS1wire		;[2] Start Window line = L, 1us <= Tlowr <= 15us
                                    	ldi	YL,low((2*SYSCLK)/(1000000*4))  ;[1] 2us
                                    	ldi	YH,high((2*SYSCLK)/(1000000*4)) ;[1] loop cycle = 4
                                    BW0:	sbiw	YL,1 				;[2]
                                    	BRNE	BW0  				;[1/2] eddig
                                    
                                    	SBRC	R0,0				;[1/2]
                                    	 CBI	DS1wire_DIR,DS1wire		;[2]
                                    
                                    	ldi	YL,low((13*SYSCLK)/(1000000*4))  ;[1] 13us
                                    	ldi	YH,high((13*SYSCLK)/(1000000*4)) ;[1] loop cycle = 4
                                    BW1:	sbiw	YL,1				;[2]
                                    	BRNE	BW1  				;[1/2]
                                    
                                    	IN	R2,DS1wire_PIN			;[1]
                                    	BST	R2,DS1wire			;[1]
                                    	BLD	R1,7				;[1]
                                    
                                    	ldi	YL,low((45*SYSCLK)/(1000000*4)) ;[1] 45us
                                    	ldi	YH,high((45*SYSCLK)/(1000000*4));[1] loop cycle = 4
                                    TCHL:	sbiw	YL,1				;[2]
                                    	BRNE	TCHL				;[1/2]
                                    	CBI	DS1wire_DIR,DS1wire		;[2]
                                    	RET					;[4]
                                    
                                    
                                    ;***********************************************************************
                                    ;.......................................................................
                                    ;Read ROM
                                    ; In:  X = address
                                    ; Out:
                                    ;c=1 Chip kiolvasva
                                    ;c=0 Chip nincs
                                    ;(Beolvas egy chippet az X-ban megadott cimre)
                                    ;
                                    ;Hasznalja a R18, R17, R16, R3, R2, R0;
                                    ;.......................................................................
                                    ReadDS:
                                    	LDI	XL,LOW(DSRD)
                                    	LDI	XH,HIGH(DSRD)	;ide olvassa DS Chipet
                                    
                                    	clr	R16
                                    	sts	CRC,R16		;CRC=0
                                    	rcall	TouchReset
                                    	BRCS	RDS1		;ESZKOZ A BUSZON VAN
                                    	CLC
                                    	RET
                                    
                                    RDS1:
                                    	LDI	R16,DSReadROM	;SEARCH ROM COMMAND
                                    	MOV	R0,R16
                                    	LDI	R19,7		;7-SZER OLVASUNK BE
                                    	RCALL	TouchByte
                                    RDS2:	LDI	R16,0xFF	;BEOLVASUNK 8 BITET
                                    	MOV	R0,R16
                                    	RCALL	TouchByte
                                    	ST	X+,R1
                                    	RCALL	CRCGEN
                                    	DEC	R19
                                    	BRNE	RDS2
                                    	LDI	R16,0xFF	;BEOLVASSUK A CRC-t
                                    	MOV	R0,R16
                                    	RCALL	TouchByte
                                    	ST	X+,R1
                                    	ldi	YL,low((480*SYSCLK)/4000000)
                                    	ldi	YH,high((480*SYSCLK)/4000000)
                                    RDS3:	sbiw	YL,1
                                    	brne	RDS3
                                    	SEC			;CHIP RENDBEN
                                    	RET
                                    
                                    
                                    
                                    ;***********************************************************************
                                    ;.......................................................................
                                    ;Read Scratchpad
                                    ; In:  X = address
                                    ; Out:
                                    ;c=1 Chip kiolvasva
                                    ;c=0 Chip nincs
                                    ;(Beolvassa a Scratchpadot az X-ban megadott cimre)
                                    ;
                                    ;Hasznalja a R19, R18, R17, R16, R3, R2, R0;  X
                                    ;.......................................................................
                                    ReadScratchpadMem:
                                    	LDI	XL,LOW(DSRDMem)
                                    	LDI	XH,HIGH(DSRDMem)	;ide olvassa DS Chipet
                                    
                                    	LDI	R16,DSSkipROM		;Skip ROM Command
                                    	MOV	R0,R16
                                    	RCALL	TouchByte
                                    
                                    	ldi	R16,DSReadScratchpad
                                    	mov	R0,R16
                                    	RCALL	TouchByte
                                    	clr	R16
                                    	sts	CRC,R16		;CRC=0
                                    
                                    
                                    	LDI	R19,8		;Read 8 byte
                                    RDS2s:	LDI	R16,0xFF
                                    	MOV	R0,R16
                                    	RCALL	TouchByte
                                    	ST	X+,R1
                                    	RCALL	CRCGEN
                                    	DEC	R19
                                    	BRNE	RDS2s
                                    
                                    	LDI	R16,0xFF	;BEOLVASSUK A CRC-t
                                    	MOV	R0,R16
                                    	RCALL	TouchByte
                                    	ST	X+,R1
                                    
                                    	ldi	YL,low((480*SYSCLK)/4000000)
                                    	ldi	YH,high((480*SYSCLK)/4000000)
                                    RDS3s:	sbiw	YL,1
                                    	brne	RDS3s
                                      	RET
                                    
                                    ;***********************************************************************
                                    ;.......................................................................
                                    ;Convert Temperature to digital
                                    ; In:  -
                                    ; Out: -
                                    ;c=1 Chip convert ok
                                    ;c=0 Chip none
                                    ;
                                    ;Hasznalja a R18, R17, R16, R3, R2, R0;  SWTmr0
                                    ;.......................................................................
                                    ConvTemp:
                                    	LDI	R16,DSConvertTemp	;Convert T Command
                                    	MOV	R0,R16
                                    	RCALL	TouchByte
                                    
                                    	sbi	DS1wire_PORT,DS1wire	;1-wire port ACTIVE 'H' during convert
                                    	sbi	DS1wire_DIR,DS1wire
                                    
                                    	ldi	R16,(SYSTACK/4)*3  		;most 0.75s a gyari 0.5s helyett
                                    	sts	SWTmr0,R16
                                    	sei				;interrupt enabled!!!
                                    W1sec:
                                    	sleep
                                    	nop
                                    	lds	R16,SWTmr0
                                    	cpi	R16,0
                                    	brne	W1sec
                                    
                                    	cbi	DS1wire_PORT,DS1wire		;1-wire port tre-stated, external pullup
                                    	cbi	DS1wire_DIR,DS1wire
                                    	nop
                                    	rcall	TouchReset
                                    	ret
                                    
                                    
                                    ;*************************************************************************
                                    ;.........................................................................
                                    ; DS1990A CRC GENERATOR
                                    ;IN: R1
                                    ;USE: R21,R20, R4,R3, R0, R18
                                    ;.........................................................................
                                    CRCGEN:	PUSH	R1
                                    	LDI	R20,8
                                    	LDI	R18,0x18
                                    	PUSH	R1
                                    
                                    CRC_L:	lds	R3,CRC		;CRC
                                    	EOR	R1,R3
                                    	ROR	R1
                                    	MOV	R1,R3
                                    	BRCC	ZERO
                                    	EOR	R1,R18
                                    ZERO:	ROR	R1
                                    	sts	CRC,R1
                                    	POP	R1
                                    	SEC
                                    	SBRS	R1,0
                                    	 CLC
                                    	ROR	R1
                                    	PUSH	R1
                                    	DEC	R20
                                    	BRNE	CRC_L
                                    	POP	R1
                                    
                                    	POP	R1
                                    	RET
                                    
                                    
                                    ;*************************************************************************
                                    ;.........................................................................
                                    ; wait until Dallas 1-wire device is on bus
                                    ;IN:
                                    ;USE:
                                    ;.........................................................................
                                    EszkVan:	CLI
                                    		rcall TouchReset
                                    		rcall ReadDS
                                    		SEI
                                    		brcs	EszkVan		;mig eszkoz van a buszon, addig nem megy tovabb
                                    
                                    		ldi	YL,low(1285)	;legalabb 1785 ciklusig ne legyenek a buszon
                                    		ldi	YH,high(1285)
                                    Cikl1:		push	YL
                                    		push	YH
                                    		CLI
                                    		rcall ReadDS
                                    		SEI
                                    		pop	YH
                                    		pop	YL
                                    		brcs	EszkVan		;ha ismet eszkoz van kezdjuk elolrol!!
                                    		sbiw	YL,1
                                    		brne	Cikl1
                                    		ret
                                    
                                    
                                    
                                    ;*************************************************************************
                                    ;.........................................................................
                                    ; Extend DS1920 & DS1820 temperature
                                    ;IN:
                                    ; out R23:R22 - temperature
                                    ;USE:
                                    ;
                                    ;Tc=8T-2+(8*Count-8*Remainder)/8Count
                                    ;.........................................................................
                                    ComuteT:	LDI	ZL,LOW(DSRDMem)
                                    		LDI	ZH,HIGH(DSRDMem)	;ide olvassa DS Chipet
                                    
                                    		LDD	dd16uL,Z+7		;CPC
                                    		LDI	dd16uH,0
                                    
                                    		LDD	R22,Z+6			;CRM
                                    		LDI	R23,0
                                    
                                    		LSL	dd16uL			;8*CPC
                                    		ROL	dd16uH
                                    		LSL	dd16uL
                                    		ROL	dd16uH
                                    		LSL	dd16uL
                                    		ROL	dd16uH
                                    
                                    
                                    		LSL	R22			;8*CRM
                                    		ROL	R23
                                    		LSL	R22
                                    		ROL	R23
                                    		LSL	R22
                                    		ROL	R23
                                    
                                    
                                    		SUB	dd16uL,R22
                                    		SBC	dd16uH,R23
                                    
                                    
                                    		LDD	dv16uL,Z+7		;CPC
                                    		LDI	dv16uH,0
                                    
                                    
                                    
                                    
                                    		MOV	R0,dv16uL
                                    		OR	r0,dv16uH
                                    		BRNE	DIV1			;0-VAL NEM OSZTUNK
                                    		LDI	R16,0
                                    		LDI	R17,0
                                    		RJMP	LKI1
                                    
                                    DIV1:		RCALL	div16u			;OSZTAS eredmeny az R16,R17-ben
                                    
                                    
                                    LKI1:		CLC
                                    		SBCI	dres16uL,2
                                    		SBCI	dres16uH,0		;eredmeny-2
                                    
                                    
                                    
                                    		LDD	R22,Z+0			;Temperature
                                    		LDD	R23,Z+1
                                    		CBR	R22,1			;Truncate 0.5C
                                    
                                    
                                    		LSL	R22			;8*T
                                    		ROL	R23
                                    		LSL	R22
                                    		ROL	R23
                                    		LSL	R22
                                    		ROL	R23
                                    
                                    		ADD	R22,dres16uL		;R22,R23 a korigalt homerseklet
                                    		ADC	R23,dres16uH
                                    		ret
                                    
                                    
                                    
                                    
                                 

Programming the AVR Microcontrollers in Assember Machine Language

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Atmel AVR From Wikipedia, the free encyclopedia (Redirected from Avr) Jump to: navigation, search The AVRs are a family of RISC microcontrollers from Atmel. Their internal architecture was conceived by two students: Alf-Egil Bogen and Vegard Wollan, at the Norwegian Institute of Technology (NTH] and further developed at Atmel Norway, a subsidiary founded by the two architects. Atmel recently released the Atmel AVR32 line of microcontrollers. These are 32-bit RISC devices featuring SIMD and DSP instructions, along with many additional features for audio and video processing, intended to compete with ARM based processors. Note that the use of "AVR" in this article refers to the 8-bit RISC line of Atmel AVR Microcontrollers. The acronym AVR has been reported to stand for Advanced Virtual RISC. It's also rumoured to stand for the company's founders: Alf and Vegard, who are evasive when questioned about it. Contents [hide] 1 Device Overview 1.1 Program Memory 1.2 Data Memory and Registers 1.3 EEPROM 1.4 Program Execution 1.5 Speed 2 Development 3 Features 4 Footnotes 5 See also 6 External Links 6.1 Atmel Official Links 6.2 AVR Forums & Discussion Groups 6.3 Machine Language Development 6.4 C Language Development 6.5 BASIC & Other AVR Languages 6.6 AVR Butterfly Specific 6.7 Other AVR Links [edit] Device Overview The AVR is a Harvard architecture machine with programs and data stored and addressed separately. Flash, EEPROM, and SRAM are all integrated onto a single die, removing the need for external memory (though still available on some devices). [edit] Program Memory Program instructions are stored in semi-permanent Flash memory. Each instruction for the AVR line is either 16 or 32 bits in length. The Flash memory is addressed using 16 bit word sizes. The size of the program memory is indicated in the naming of the device itself. For instance, the ATmega64x line has 64Kbytes of Flash. Almost all AVR devices are self-programmable. [edit] Data Memory and Registers The data address space consists of the register file, I/O registers, and SRAM. The AVRs have thirty-two single-byte registers and are classified as 8-bit RISC devices. The working registers are mapped in as the first thirty-two memory spaces (000016-001F16) followed by the 64 I/O registers (002016-005F16). The actual usable RAM starts after both these sections (address 006016). (Note that the I/O register space may be larger on some more extensive devices, in which case memory mapped I/O registers will occupy a portion of the SRAM.) Even though there are separate addressing schemes and optimized opcodes for register file and I/O register access, all can still be addressed and manipulated as if they were in SRAM. [edit] EEPROM Almost all devices have on-die EEPROM. This is most often used for long-term parameter storage to be retrieved even after cycling the power of the device. [edit] Program Execution Atmel's AVRs have a single level pipeline design. The next machine instruction is fetched as the current one is executing. Most instructions take just one or two clock cycles, making AVRs relatively fast among the eight-bit microcontrollers. The AVR family of processors were designed for the efficient execution of compiled C code. The AVR instruction set is more orthogonal than most eight-bit microcontrollers, however, it is not completely regular: Pointer registers X, Y, and Z have addressing capabilities that are different from each other. Register locations R0 to R15 have different addressing capabilities than register locations R16 to R31. I/O ports 0 to 31 have different addressing capabilities than I/O ports 32 to 63. CLR affects flags, while SER does not, even though they are complementary instructions. CLR set all bits to zero and SER sets them to one. (Note though, that neither CLR nor SER are native instructions. Instead CLR is syntactic sugar for [produces the same machine code as] EOR R,R while SER is syntactic sugar for LDI R,$FF. Math operations such as EOR modify flags while moves/loads/stores/branches such as LDI do not.) [edit] Speed The AVR line can normally support clock speeds from 0-16MHz, with some devices reaching 20MHz. Lower powered operation usually requires a reduced clock speed. All AVRs feature an on-chip oscillator, removing the need for external clocks or resonator circuitry. Because many operations on the AVR are single cycle, the AVR can achieve up to 1MIPS per MHz. [edit] Development AVRs have a large following due to the free and inexpensive development tools available, including reasonably priced development boards and free development software. The AVRs are marketed under various names that share the same basic core but with different peripheral and memory combinations. Some models (notably, the ATmega range) have additional instructions to make arithmetic faster. Compatibility amongst chips is fairly good. See external links for sites relating to AVR development. [edit] Features Current AVRs offer a wide range of features: RISC Core Running Many Single Cycle Instructions Multifunction, Bi-directional I/O Ports with Internal, Configurable Pull-up Resistors Multiple Internal Oscillators Internal, Self-Programmable Instruction Flash Memory up to 256K In-System Programmable using ICSP, JTAG, or High Voltage methods Optional Boot Code Section with Independent Lock Bits for Protection Internal Data EEPROM up to 4KB Internal SRAM up to 8K 8-Bit and 16-Bit Timers PWM Channels & dead time generator Lighting (PWM Specific) Controller models Dedicated IC Compatible Two-Wire Interface (TWI) Synchronous/Asynchronous Serial Peripherals (UART/USART) (As used with RS-232,RS-485, and more) Serial Peripheral Interface (SPI) CAN Controller Support USB Controller Support Proper High-speed hardware & Hub controller with embedded AVR. Also freely available low-speed (HID) software emulation Ethernet Controller Support Universal Serial Interface (USI) for Two or Three-Wire Synchronous Data Transfer Analog Comparators LCD Controller Support 10-Bit A/D Converters, with multiplex of up to 16 channels Brownout Detection Watchdog Timer (WDT) Low-voltage Devices Operating Down to 1.8v Multiple Power-Saving Sleep Modes picoPower Devices Atmel AVR assembler programming language Atmel AVR machine programming language Atmel AVR From Wikipedia, the free encyclopedia (Redirected from Avr) Jump to: navigation, search The AVRs are a family of RISC microcontrollers from Atmel. Their internal architecture was conceived by two students: Alf-Egil Bogen and Vegard Wollan, at the Norwegian Institute of Technology (NTH] and further developed at Atmel Norway, a subsidiary founded by the two architects. Atmel recently released the Atmel AVR32 line of microcontrollers. These are 32-bit RISC devices featuring SIMD and DSP instructions, along with many additional features for audio and video processing, intended to compete with ARM based processors. Note that the use of "AVR" in this article refers to the 8-bit RISC line of Atmel AVR Microcontrollers. The acronym AVR has been reported to stand for Advanced Virtual RISC. It's also rumoured to stand for the company's founders: Alf and Vegard, who are evasive when questioned about it. Contents [hide] 1 Device Overview 1.1 Program Memory 1.2 Data Memory and Registers 1.3 EEPROM 1.4 Program Execution 1.5 Speed 2 Development 3 Features 4 Footnotes 5 See also 6 External Links 6.1 Atmel Official Links 6.2 AVR Forums & Discussion Groups 6.3 Machine Language Development 6.4 C Language Development 6.5 BASIC & Other AVR Languages 6.6 AVR Butterfly Specific 6.7 Other AVR Links [edit] Device Overview The AVR is a Harvard architecture machine with programs and data stored and addressed separately. Flash, EEPROM, and SRAM are all integrated onto a single die, removing the need for external memory (though still available on some devices). [edit] Program Memory Program instructions are stored in semi-permanent Flash memory. Each instruction for the AVR line is either 16 or 32 bits in length. The Flash memory is addressed using 16 bit word sizes. The size of the program memory is indicated in the naming of the device itself. For instance, the ATmega64x line has 64Kbytes of Flash. Almost all AVR devices are self-programmable. [edit] Data Memory and Registers The data address space consists of the register file, I/O registers, and SRAM. The AVRs have thirty-two single-byte registers and are classified as 8-bit RISC devices. The working registers are mapped in as the first thirty-two memory spaces (000016-001F16) followed by the 64 I/O registers (002016-005F16). The actual usable RAM starts after both these sections (address 006016). (Note that the I/O register space may be larger on some more extensive devices, in which case memory mapped I/O registers will occupy a portion of the SRAM.) Even though there are separate addressing schemes and optimized opcodes for register file and I/O register access, all can still be addressed and manipulated as if they were in SRAM. [edit] EEPROM Almost all devices have on-die EEPROM. This is most often used for long-term parameter storage to be retrieved even after cycling the power of the device. [edit] Program Execution Atmel's AVRs have a single level pipeline design. The next machine instruction is fetched as the current one is executing. Most instructions take just one or two clock cycles, making AVRs relatively fast among the eight-bit microcontrollers. The AVR family of processors were designed for the efficient execution of compiled C code. The AVR instruction set is more orthogonal than most eight-bit microcontrollers, however, it is not completely regular: Pointer registers X, Y, and Z have addressing capabilities that are different from each other. Register locations R0 to R15 have different addressing capabilities than register locations R16 to R31. I/O ports 0 to 31 have different addressing capabilities than I/O ports 32 to 63. CLR affects flags, while SER does not, even though they are complementary instructions. CLR set all bits to zero and SER sets them to one. (Note though, that neither CLR nor SER are native instructions. Instead CLR is syntactic sugar for [produces the same machine code as] EOR R,R while SER is syntactic sugar for LDI R,$FF. Math operations such as EOR modify flags while moves/loads/stores/branches such as LDI do not.) [edit] Speed The AVR line can normally support clock speeds from 0-16MHz, with some devices reaching 20MHz. Lower powered operation usually requires a reduced clock speed. All AVRs feature an on-chip oscillator, removing the need for external clocks or resonator circuitry. Because many operations on the AVR are single cycle, the AVR can achieve up to 1MIPS per MHz. [edit] Development AVRs have a large following due to the free and inexpensive development tools available, including reasonably priced development boards and free development software. The AVRs are marketed under various names that share the same basic core but with different peripheral and memory combinations. Some models (notably, the ATmega range) have additional instructions to make arithmetic faster. Compatibility amongst chips is fairly good. See external links for sites relating to AVR development. [edit] Features Current AVRs offer a wide range of features: RISC Core Running Many Single Cycle Instructions Multifunction, Bi-directional I/O Ports with Internal, Configurable Pull-up Resistors Multiple Internal Oscillators Internal, Self-Programmable Instruction Flash Memory up to 256K In-System Programmable using ICSP, JTAG, or High Voltage methods Optional Boot Code Section with Independent Lock Bits for Protection Internal Data EEPROM up to 4KB Internal SRAM up to 8K 8-Bit and 16-Bit Timers PWM Channels & dead time generator Lighting (PWM Specific) Controller models Dedicated IC Compatible Two-Wire Interface (TWI) Synchronous/Asynchronous Serial Peripherals (UART/USART) (As used with RS-232,RS-485, and more) Serial Peripheral Interface (SPI) CAN Controller Support USB Controller Support Proper High-speed hardware & Hub controller with embedded AVR. Also freely available low-speed (HID) software emulation Ethernet Controller Support Universal Serial Interface (USI) for Two or Three-Wire Synchronous Data Transfer Analog Comparators LCD Controller Support 10-Bit A/D Converters, with multiplex of up to 16 channels Brownout Detection Watchdog Timer (WDT) Low-voltage Devices Operating Down to 1.8v Multiple Power-Saving Sleep Modes picoPower Devices Atmel AVR assembler programming language Atmel AVR machine programming language Atmel AVR From Wikipedia, the free encyclopedia (Redirected from Avr) Jump to: navigation, search The AVRs are a family of RISC microcontrollers from Atmel. Their internal architecture was conceived by two students: Alf-Egil Bogen and Vegard Wollan, at the Norwegian Institute of Technology (NTH] and further developed at Atmel Norway, a subsidiary founded by the two architects. Atmel recently released the Atmel AVR32 line of microcontrollers. These are 32-bit RISC devices featuring SIMD and DSP instructions, along with many additional features for audio and video processing, intended to compete with ARM based processors. Note that the use of "AVR" in this article refers to the 8-bit RISC line of Atmel AVR Microcontrollers. The acronym AVR has been reported to stand for Advanced Virtual RISC. It's also rumoured to stand for the company's founders: Alf and Vegard, who are evasive when questioned about it. Contents [hide] 1 Device Overview 1.1 Program Memory 1.2 Data Memory and Registers 1.3 EEPROM 1.4 Program Execution 1.5 Speed 2 Development 3 Features 4 Footnotes 5 See also 6 External Links 6.1 Atmel Official Links 6.2 AVR Forums & Discussion Groups 6.3 Machine Language Development 6.4 C Language Development 6.5 BASIC & Other AVR Languages 6.6 AVR Butterfly Specific 6.7 Other AVR Links [edit] Device Overview The AVR is a Harvard architecture machine with programs and data stored and addressed separately. Flash, EEPROM, and SRAM are all integrated onto a single die, removing the need for external memory (though still available on some devices). [edit] Program Memory Program instructions are stored in semi-permanent Flash memory. Each instruction for the AVR line is either 16 or 32 bits in length. The Flash memory is addressed using 16 bit word sizes. The size of the program memory is indicated in the naming of the device itself. For instance, the ATmega64x line has 64Kbytes of Flash. Almost all AVR devices are self-programmable. [edit] Data Memory and Registers The data address space consists of the register file, I/O registers, and SRAM. The AVRs have thirty-two single-byte registers and are classified as 8-bit RISC devices. The working registers are mapped in as the first thirty-two memory spaces (000016-001F16) followed by the 64 I/O registers (002016-005F16). The actual usable RAM starts after both these sections (address 006016). (Note that the I/O register space may be larger on some more extensive devices, in which case memory mapped I/O registers will occupy a portion of the SRAM.) Even though there are separate addressing schemes and optimized opcodes for register file and I/O register access, all can still be addressed and manipulated as if they were in SRAM. [edit] EEPROM Almost all devices have on-die EEPROM. This is most often used for long-term parameter storage to be retrieved even after cycling the power of the device. [edit] Program Execution Atmel's AVRs have a single level pipeline design. The next machine instruction is fetched as the current one is executing. Most instructions take just one or two clock cycles, making AVRs relatively fast among the eight-bit microcontrollers. The AVR family of processors were designed for the efficient execution of compiled C code. The AVR instruction set is more orthogonal than most eight-bit microcontrollers, however, it is not completely regular: Pointer registers X, Y, and Z have addressing capabilities that are different from each other. Register locations R0 to R15 have different addressing capabilities than register locations R16 to R31. I/O ports 0 to 31 have different addressing capabilities than I/O ports 32 to 63. CLR affects flags, while SER does not, even though they are complementary instructions. CLR set all bits to zero and SER sets them to one. (Note though, that neither CLR nor SER are native instructions. Instead CLR is syntactic sugar for [produces the same machine code as] EOR R,R while SER is syntactic sugar for LDI R,$FF. Math operations such as EOR modify flags while moves/loads/stores/branches such as LDI do not.) [edit] Speed The AVR line can normally support clock speeds from 0-16MHz, with some devices reaching 20MHz. Lower powered operation usually requires a reduced clock speed. All AVRs feature an on-chip oscillator, removing the need for external clocks or resonator circuitry. Because many operations on the AVR are single cycle, the AVR can achieve up to 1MIPS per MHz. [edit] Development AVRs have a large following due to the free and inexpensive development tools available, including reasonably priced development boards and free development software. The AVRs are marketed under various names that share the same basic core but with different peripheral and memory combinations. Some models (notably, the ATmega range) have additional instructions to make arithmetic faster. Compatibility amongst chips is fairly good. See external links for sites relating to AVR development. [edit] Features Current AVRs offer a wide range of features: RISC Core Running Many Single Cycle Instructions Multifunction, Bi-directional I/O Ports with Internal, Configurable Pull-up Resistors Multiple Internal Oscillators Internal, Self-Programmable Instruction Flash Memory up to 256K In-System Programmable using ICSP, JTAG, or High Voltage methods Optional Boot Code Section with Independent Lock Bits for Protection Internal Data EEPROM up to 4KB Internal SRAM up to 8K 8-Bit and 16-Bit Timers PWM Channels & dead time generator Lighting (PWM Specific) Controller models Dedicated IC Compatible Two-Wire Interface (TWI) Synchronous/Asynchronous Serial Peripherals (UART/USART) (As used with RS-232,RS-485, and more) Serial Peripheral Interface (SPI) CAN Controller Support USB Controller Support Proper High-speed hardware & Hub controller with embedded AVR. Also freely available low-speed (HID) software emulation Ethernet Controller Support Universal Serial Interface (USI) for Two or Three-Wire Synchronous Data Transfer Analog Comparators LCD Controller Support 10-Bit A/D Converters, with multiplex of up to 16 channels Brownout Detection Watchdog Timer (WDT) Low-voltage Devices Operating Down to 1.8v Multiple Power-Saving Sleep Modes picoPower Devices Atmel AVR assembler programming language Atmel AVR machine programming language