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DELAYS PACKAGE

                                    ;******************************************************************************
                                    ;_Delays.asm Version 0.0a
                                    ;******************************************************************************
                                    ;
                                    ;Written for  : Atmel "AVR Assembler" and "AVR Assembler 2"
                                    ;        when : 2005 November 20
                                    ;        where: BRUSSELS - BELGIUM - EUROPE
                                    ;        who  : Jan Huygh
                                    ;       E-mail: jan.huygh@skynet.be
                                    
                                    ;******************************************************************************
                                    ;A WORD FROM THE AUTHOR :
                                    ;
                                    ;I would find it motivating to find out that people use this code.
                                    ;
                                    ;On regular base (every 10 to 12 weeks) I gather the comments on the code I
                                    ;posted and use the comments to improve my code. If you have constructive
                                    ;comment then let me know.
                                    ;     * Give me an evaluation.
                                    ;     * Send me a mail (jan.huygh@skynet.be) subject "I use your _Delays.asm".
                                    ;     * Send me a mail (jan.huygh@skynet.be) subject "Comment on your _Delays.asm"
                                    
                                    ;******************************************************************************
                                    ;ABOUT VERSION 0.0a
                                    ;
                                    ;This is the first posted version.
                                    ;
                                    ;  KNOWN BUGS :
                                    ;    * None so far
                                    ;  OPPORTUNITIES FOR IMPROVEMENT :
                                    ;	 * a version that can be used as a subroutine taking in to acount the time
                                    ;      for the call and for the return.
                                    ;    * a version that takes the input from the stack so it can take a variable
                                    ;      for the input.
                                    ;    * a version that is less precise but takes less bytes of program memory
                                    ;		
                                    
                                    ;******************************************************************************
                                    ;.INCLUDE "_Delays.asm" enables you to use the following macro in your code
                                    ;
                                    ;	_Waiste_us n
                                    ;		With  (1.000.000/F_CPU) <= n <= 25769803779/Your_CPU_frequency_in_MHz
                                    ;
                                    ; 	     This macro will generate a wait loop from 1 s to 25.769.803.779 s
                                    ;            Depending on the CPU-speed set in F_CPU here below you will need to
                                    ;            respect a minimum value for n.  (n_minimum) = 1.000.000/F_CPU).
                                    ;            This is needed because we can not loop for less then 1
                                    ;            instruction cycle.
                                    ;	     25.769.803.779 s, that's over 3h30 when you use a CPU running at 20 MHz.
                                    ;        _Waiste_us is absolutely exact down to (1/Your_CPU_frequency_in_MHz) s
                                    ;        _Waiste_us will pick the smallest code for your delay (Maximum 13 words)
                                    
                                    ;******************************************************************************
                                    ;How to use this in your code :
                                    ;
                                    ; A) Pick the correct ".equ F_CPU = x" statement
                                    ;   AND
                                    ;    save this file to your disk
                                    ;
                                    ; B) Make sure it is in the same folder as the other files of your current project
                                    ;	OR
                                    ;	 Make sure the folder where you saved this file is referenced in the
                                    ;	 assembler options (Project=>Assembler Options=>Additional include path)
                                    ;
                                    ; C) Include the statement .INCLUDE "_Delays.asm" at the top of your program
                                    ;
                                    ; D) Use the statement _Waiste_us n, in your code
                                    ;
                                    ;Here is a code example :
                                    ;
                                    ;	.INCLUDE "_Waiste.asm"		;Make the macro _Waiste_us n available in your code
                                    ;	_Waiste_us 100				;loop for       100 s (that's  0,1 ms)
                                    ;	_Waiste_us 16000   			;loop for    16.000 s (that's 16   ms)
                                    ;	_Waiste_us 7000000			;loop for 7.000.000 s (that's  7   s )
                                    ;
                                    
                                    ;******************************************************************************
                                    ;The CPU-speed needs to be set before you can use _Waiste_us.
                                    ;Find your CPU-speed in the list here below and uncomment it (remove the ";")
                                    ;then press Ctrl^S to save to disk otherwise the include file used by AVR studio
                                    ;will be the unchanged version on your disk.
                                    ;
                                    ;											    
                                    ;	.equ	F_CPU =  1000000 ;Hz
                                    ;	.equ	F_CPU =  2000000 ;Hz
                                    	.equ	F_CPU =  3579545 ;Hz
                                    ;	.equ	F_CPU =  3686400 ;Hz
                                    ;	.equ	F_CPU =  4000000 ;Hz
                                    ;	.equ	F_CPU =  4032000 ;Hz
                                    ;	.equ	F_CPU =  4096000 ;Hz
                                    ;	.equ	F_CPU =  4194304 ;Hz
                                    ;	.equ	F_CPU =  4433619 ;Hz
                                    ;	.equ	F_CPU =  4915200 ;Hz
                                    ;	.equ	F_CPU =  5000000 ;Hz
                                    ;	.equ	F_CPU =  5068800 ;Hz
                                    ;	.equ	F_CPU =  5990400 ;Hz
                                    ;	.equ	F_CPU =  6000000 ;Hz
                                    ;	.equ	F_CPU =  6144000 ;Hz
                                    ;	.equ	F_CPU =  6500000 ;Hz
                                    ;	.equ	F_CPU =  7372800 ;Hz
                                    ;	.equ	F_CPU =  7680000 ;Hz
                                    ;	.equ	F_CPU =  8000000 ;Hz
                                    ;	.equ	F_CPU =  9000000 ;Hz
                                    ;	.equ	F_CPU =  9216000 ;Hz
                                    ;	.equ	F_CPU =  9830400 ;Hz
                                    ;	.equ	F_CPU = 10000000 ;Hz
                                    ;	.equ	F_CPU = 10240000 ;Hz
                                    ;	.equ	F_CPU = 11000000 ;Hz
                                    ;	.equ	F_CPU = 11059200 ;Hz
                                    ;	.equ	F_CPU = 11520000 ;Hz
                                    ;	.equ	F_CPU = 12000000 ;Hz
                                    ;	.equ	F_CPU = 12000393 ;Hz
                                    ;	.equ	F_CPU = 12288000 ;Hz
                                    ;	.equ	F_CPU = 13500000 ;Hz
                                    ;	.equ	F_CPU = 14318180 ;Hz
                                    ;	.equ	F_CPU = 14745600 ;Hz
                                    ;	.equ	F_CPU = 15000000 ;Hz
                                    ;	.equ	F_CPU = 15360000 ;Hz
                                    ;	.equ	F_CPU = 16000000 ;Hz
                                    ;	.equ	F_CPU = 16000312 ;Hz
                                    ;	.equ	F_CPU = 16257000 ;Hz
                                    ;	.equ	F_CPU = 16384000 ;Hz
                                    ;	.equ	F_CPU = 17734475 ;Hz
                                    ;	.equ	F_CPU = 18000000 ;Hz
                                    ;	.equ	F_CPU = 18432000 ;Hz
                                    ;	.equ	F_CPU = 19660800 ;Hz
                                    ;	.equ	F_CPU = 20000000 ;Hz
                                    
                                    
                                    .Macro _Waiste_us ;n
                                    ;	Calculate the number of CPU-cycles needed to generate the requested delay
                                    ;	taking in to account the frequency you are using for your CPU.
                                    ;   You can simplify the next 9 lines of code before "_Cycle_Waister Cycles_Needed"
                                    ;   to "Cycles_Needed = @0 * F_CPU / 1000000". If you do so _Waist_us will
                                    ;   generate the exact delay you requested or the delay obtained by executing the
                                    ;   number of cpu-cycles that brings just less then the delay you requested.
                                    ;   This might be a good option if you need a certain delay but need to be sure
                                    ;   you never have a delay that is even a fraction of a CPU-cycle longer than the
                                    ;   delay you requested.
                                    ;	The 9 lines of code here below do NOT use any space in the actual program
                                    ;   memory of your AVR.
                                    ;	The code here below will actually pick the number of CPU-cycles needed to
                                    ;   generate EXACTLY the delay you requested and when that can not be achieved
                                    ;   it will select the number of cycles that generate the delay that is the best 
                                    ;   approximation for the delay you requested even if that is just above the 
                                    ;   delay you requested.
                                    	.set	Fraction = @0*F_CPU/1000000					;
                                    	.set 	Fraction = Fraction * 100
                                    	.set	Fraction = @0*F_CPU/10000 - Fraction
                                    	.if		Fraction >= 50
                                    		.equ 	Cycles_Needed = (@0 * F_CPU /1000000)+1
                                    	.endif
                                    	.if		Fraction < 50
                                    		.equ 	Cycles_Needed = (@0 * F_CPU /1000000)
                                    	.endif
                                    	_Cycle_Waister Cycles_Needed
                                    .endmacro
                                    
                                    .macro _Cycle_Waister
                                    	.If @0 == 1
                                    		nop
                                    	.EndIf
                                    	.If @0 == 2
                                    		nop
                                    		nop
                                    	.EndIf
                                    	.If ((@0 > 2) && (@0 < 769))
                                    	;C=3n
                                    	;769=(3 * (2^8)) + 1
                                    		.set	Loops_Needed = @0/3
                                    		ldi		R16,Low(Loops_Needed)
                                      	   Loop:
                                      		dec		R16
                                    		brne	Loop
                                    		.set	Cycles_Left_To_Do = @0 - (3*Loops_Needed)
                                    		_Cycle_Waister Cycles_Left_To_Do
                                    	.EndIf
                                    	.If (@0 > 768) && (@0 < 262146)
                                    	;C=1+4n
                                    	;262146 = 1 + (4 * 2^16) + 1
                                    		.set	Loops_Needed = (@0 - 1)/4
                                    		ldi		ZL,Low(Loops_Needed)
                                    		ldi		ZH,High(Loops_Needed)
                                      	   Loop:	
                                      		sbiw	ZL,1
                                    		brne	Loop
                                    		.set Cycles_Left_To_Do = (@0 - (4*Loops_Needed))-1
                                    		_Cycle_Waister Cycles_Left_To_Do
                                    	.EndIf
                                    	.If (@0 > 262145) && (@0 < 83886083)
                                    	;C=2+5n
                                    	;83.886.083 = 2 + (5 * 2^24) +1
                                    		.set	Loops_Needed = (@0 - 2)/5
                                    		ldi		R16,Low(Loops_Needed)
                                    		ldi		ZL,Byte2(Loops_Needed)
                                    		ldi		ZH,Byte3(Loops_Needed)
                                      	   Loop:
                                      		subi	R16,1
                                    		sbci	ZL,0
                                    		sbci	ZH,0
                                    		brne	Loop
                                    		.set Cycles_Left_To_Do = (@0 - (5*Loops_Needed))-2
                                    		_Cycle_Waister Cycles_Left_To_Do
                                    	.EndIf
                                    	.If (@0 > 83886082) && (@0 < 25769803780)
                                    	;C=3+6n
                                    	;25769803780 = 3 + (6 * 2^32) +1
                                    		.set	Loops_Needed = (@0 - 3)6
                                    		ldi		XL,Low(Loops_Needed)
                                    		ldi		XH,Byte2(Loops_Needed)
                                    		ldi		ZL,Byte3(Loops_Needed)
                                    		ldi		ZH,Byte4(Loops_Needed)
                                      	   Loop:
                                       		sbiw	Xl
                                    		sbci	ZL,0
                                    		sbci	ZH,0
                                    		brne	Loop
                                    		.set Cycles_Left_To_Do = (@0 - (6*Loops_Needed)) - 3
                                    		_Cycle_Waister Cycles_Left_To_Do
                                    	.endif
                                    .endmacro
                                    
                                    
                                    
                                 

Programming the AVR Microcontrollers in Assember Machine Language

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Atmel AVR From Wikipedia, the free encyclopedia (Redirected from Avr) Jump to: navigation, search The AVRs are a family of RISC microcontrollers from Atmel. Their internal architecture was conceived by two students: Alf-Egil Bogen and Vegard Wollan, at the Norwegian Institute of Technology (NTH] and further developed at Atmel Norway, a subsidiary founded by the two architects. Atmel recently released the Atmel AVR32 line of microcontrollers. These are 32-bit RISC devices featuring SIMD and DSP instructions, along with many additional features for audio and video processing, intended to compete with ARM based processors. Note that the use of "AVR" in this article refers to the 8-bit RISC line of Atmel AVR Microcontrollers. The acronym AVR has been reported to stand for Advanced Virtual RISC. It's also rumoured to stand for the company's founders: Alf and Vegard, who are evasive when questioned about it. Contents [hide] 1 Device Overview 1.1 Program Memory 1.2 Data Memory and Registers 1.3 EEPROM 1.4 Program Execution 1.5 Speed 2 Development 3 Features 4 Footnotes 5 See also 6 External Links 6.1 Atmel Official Links 6.2 AVR Forums & Discussion Groups 6.3 Machine Language Development 6.4 C Language Development 6.5 BASIC & Other AVR Languages 6.6 AVR Butterfly Specific 6.7 Other AVR Links [edit] Device Overview The AVR is a Harvard architecture machine with programs and data stored and addressed separately. Flash, EEPROM, and SRAM are all integrated onto a single die, removing the need for external memory (though still available on some devices). [edit] Program Memory Program instructions are stored in semi-permanent Flash memory. Each instruction for the AVR line is either 16 or 32 bits in length. The Flash memory is addressed using 16 bit word sizes. The size of the program memory is indicated in the naming of the device itself. For instance, the ATmega64x line has 64Kbytes of Flash. Almost all AVR devices are self-programmable. [edit] Data Memory and Registers The data address space consists of the register file, I/O registers, and SRAM. The AVRs have thirty-two single-byte registers and are classified as 8-bit RISC devices. The working registers are mapped in as the first thirty-two memory spaces (000016-001F16) followed by the 64 I/O registers (002016-005F16). The actual usable RAM starts after both these sections (address 006016). (Note that the I/O register space may be larger on some more extensive devices, in which case memory mapped I/O registers will occupy a portion of the SRAM.) Even though there are separate addressing schemes and optimized opcodes for register file and I/O register access, all can still be addressed and manipulated as if they were in SRAM. [edit] EEPROM Almost all devices have on-die EEPROM. This is most often used for long-term parameter storage to be retrieved even after cycling the power of the device. [edit] Program Execution Atmel's AVRs have a single level pipeline design. The next machine instruction is fetched as the current one is executing. Most instructions take just one or two clock cycles, making AVRs relatively fast among the eight-bit microcontrollers. The AVR family of processors were designed for the efficient execution of compiled C code. The AVR instruction set is more orthogonal than most eight-bit microcontrollers, however, it is not completely regular: Pointer registers X, Y, and Z have addressing capabilities that are different from each other. Register locations R0 to R15 have different addressing capabilities than register locations R16 to R31. I/O ports 0 to 31 have different addressing capabilities than I/O ports 32 to 63. CLR affects flags, while SER does not, even though they are complementary instructions. CLR set all bits to zero and SER sets them to one. (Note though, that neither CLR nor SER are native instructions. Instead CLR is syntactic sugar for [produces the same machine code as] EOR R,R while SER is syntactic sugar for LDI R,$FF. Math operations such as EOR modify flags while moves/loads/stores/branches such as LDI do not.) [edit] Speed The AVR line can normally support clock speeds from 0-16MHz, with some devices reaching 20MHz. Lower powered operation usually requires a reduced clock speed. All AVRs feature an on-chip oscillator, removing the need for external clocks or resonator circuitry. Because many operations on the AVR are single cycle, the AVR can achieve up to 1MIPS per MHz. [edit] Development AVRs have a large following due to the free and inexpensive development tools available, including reasonably priced development boards and free development software. The AVRs are marketed under various names that share the same basic core but with different peripheral and memory combinations. Some models (notably, the ATmega range) have additional instructions to make arithmetic faster. Compatibility amongst chips is fairly good. See external links for sites relating to AVR development. [edit] Features Current AVRs offer a wide range of features: RISC Core Running Many Single Cycle Instructions Multifunction, Bi-directional I/O Ports with Internal, Configurable Pull-up Resistors Multiple Internal Oscillators Internal, Self-Programmable Instruction Flash Memory up to 256K In-System Programmable using ICSP, JTAG, or High Voltage methods Optional Boot Code Section with Independent Lock Bits for Protection Internal Data EEPROM up to 4KB Internal SRAM up to 8K 8-Bit and 16-Bit Timers PWM Channels & dead time generator Lighting (PWM Specific) Controller models Dedicated IC Compatible Two-Wire Interface (TWI) Synchronous/Asynchronous Serial Peripherals (UART/USART) (As used with RS-232,RS-485, and more) Serial Peripheral Interface (SPI) CAN Controller Support USB Controller Support Proper High-speed hardware & Hub controller with embedded AVR. Also freely available low-speed (HID) software emulation Ethernet Controller Support Universal Serial Interface (USI) for Two or Three-Wire Synchronous Data Transfer Analog Comparators LCD Controller Support 10-Bit A/D Converters, with multiplex of up to 16 channels Brownout Detection Watchdog Timer (WDT) Low-voltage Devices Operating Down to 1.8v Multiple Power-Saving Sleep Modes picoPower Devices Atmel AVR assembler programming language Atmel AVR machine programming language Atmel AVR From Wikipedia, the free encyclopedia (Redirected from Avr) Jump to: navigation, search The AVRs are a family of RISC microcontrollers from Atmel. Their internal architecture was conceived by two students: Alf-Egil Bogen and Vegard Wollan, at the Norwegian Institute of Technology (NTH] and further developed at Atmel Norway, a subsidiary founded by the two architects. Atmel recently released the Atmel AVR32 line of microcontrollers. These are 32-bit RISC devices featuring SIMD and DSP instructions, along with many additional features for audio and video processing, intended to compete with ARM based processors. Note that the use of "AVR" in this article refers to the 8-bit RISC line of Atmel AVR Microcontrollers. The acronym AVR has been reported to stand for Advanced Virtual RISC. It's also rumoured to stand for the company's founders: Alf and Vegard, who are evasive when questioned about it. Contents [hide] 1 Device Overview 1.1 Program Memory 1.2 Data Memory and Registers 1.3 EEPROM 1.4 Program Execution 1.5 Speed 2 Development 3 Features 4 Footnotes 5 See also 6 External Links 6.1 Atmel Official Links 6.2 AVR Forums & Discussion Groups 6.3 Machine Language Development 6.4 C Language Development 6.5 BASIC & Other AVR Languages 6.6 AVR Butterfly Specific 6.7 Other AVR Links [edit] Device Overview The AVR is a Harvard architecture machine with programs and data stored and addressed separately. Flash, EEPROM, and SRAM are all integrated onto a single die, removing the need for external memory (though still available on some devices). [edit] Program Memory Program instructions are stored in semi-permanent Flash memory. Each instruction for the AVR line is either 16 or 32 bits in length. The Flash memory is addressed using 16 bit word sizes. The size of the program memory is indicated in the naming of the device itself. For instance, the ATmega64x line has 64Kbytes of Flash. Almost all AVR devices are self-programmable. [edit] Data Memory and Registers The data address space consists of the register file, I/O registers, and SRAM. The AVRs have thirty-two single-byte registers and are classified as 8-bit RISC devices. The working registers are mapped in as the first thirty-two memory spaces (000016-001F16) followed by the 64 I/O registers (002016-005F16). The actual usable RAM starts after both these sections (address 006016). (Note that the I/O register space may be larger on some more extensive devices, in which case memory mapped I/O registers will occupy a portion of the SRAM.) Even though there are separate addressing schemes and optimized opcodes for register file and I/O register access, all can still be addressed and manipulated as if they were in SRAM. [edit] EEPROM Almost all devices have on-die EEPROM. This is most often used for long-term parameter storage to be retrieved even after cycling the power of the device. [edit] Program Execution Atmel's AVRs have a single level pipeline design. The next machine instruction is fetched as the current one is executing. Most instructions take just one or two clock cycles, making AVRs relatively fast among the eight-bit microcontrollers. The AVR family of processors were designed for the efficient execution of compiled C code. The AVR instruction set is more orthogonal than most eight-bit microcontrollers, however, it is not completely regular: Pointer registers X, Y, and Z have addressing capabilities that are different from each other. Register locations R0 to R15 have different addressing capabilities than register locations R16 to R31. I/O ports 0 to 31 have different addressing capabilities than I/O ports 32 to 63. CLR affects flags, while SER does not, even though they are complementary instructions. CLR set all bits to zero and SER sets them to one. (Note though, that neither CLR nor SER are native instructions. Instead CLR is syntactic sugar for [produces the same machine code as] EOR R,R while SER is syntactic sugar for LDI R,$FF. Math operations such as EOR modify flags while moves/loads/stores/branches such as LDI do not.) [edit] Speed The AVR line can normally support clock speeds from 0-16MHz, with some devices reaching 20MHz. Lower powered operation usually requires a reduced clock speed. All AVRs feature an on-chip oscillator, removing the need for external clocks or resonator circuitry. Because many operations on the AVR are single cycle, the AVR can achieve up to 1MIPS per MHz. [edit] Development AVRs have a large following due to the free and inexpensive development tools available, including reasonably priced development boards and free development software. The AVRs are marketed under various names that share the same basic core but with different peripheral and memory combinations. Some models (notably, the ATmega range) have additional instructions to make arithmetic faster. Compatibility amongst chips is fairly good. See external links for sites relating to AVR development. [edit] Features Current AVRs offer a wide range of features: RISC Core Running Many Single Cycle Instructions Multifunction, Bi-directional I/O Ports with Internal, Configurable Pull-up Resistors Multiple Internal Oscillators Internal, Self-Programmable Instruction Flash Memory up to 256K In-System Programmable using ICSP, JTAG, or High Voltage methods Optional Boot Code Section with Independent Lock Bits for Protection Internal Data EEPROM up to 4KB Internal SRAM up to 8K 8-Bit and 16-Bit Timers PWM Channels & dead time generator Lighting (PWM Specific) Controller models Dedicated IC Compatible Two-Wire Interface (TWI) Synchronous/Asynchronous Serial Peripherals (UART/USART) (As used with RS-232,RS-485, and more) Serial Peripheral Interface (SPI) CAN Controller Support USB Controller Support Proper High-speed hardware & Hub controller with embedded AVR. Also freely available low-speed (HID) software emulation Ethernet Controller Support Universal Serial Interface (USI) for Two or Three-Wire Synchronous Data Transfer Analog Comparators LCD Controller Support 10-Bit A/D Converters, with multiplex of up to 16 channels Brownout Detection Watchdog Timer (WDT) Low-voltage Devices Operating Down to 1.8v Multiple Power-Saving Sleep Modes picoPower Devices Atmel AVR assembler programming language Atmel AVR machine programming language Atmel AVR From Wikipedia, the free encyclopedia (Redirected from Avr) Jump to: navigation, search The AVRs are a family of RISC microcontrollers from Atmel. Their internal architecture was conceived by two students: Alf-Egil Bogen and Vegard Wollan, at the Norwegian Institute of Technology (NTH] and further developed at Atmel Norway, a subsidiary founded by the two architects. Atmel recently released the Atmel AVR32 line of microcontrollers. These are 32-bit RISC devices featuring SIMD and DSP instructions, along with many additional features for audio and video processing, intended to compete with ARM based processors. Note that the use of "AVR" in this article refers to the 8-bit RISC line of Atmel AVR Microcontrollers. The acronym AVR has been reported to stand for Advanced Virtual RISC. It's also rumoured to stand for the company's founders: Alf and Vegard, who are evasive when questioned about it. Contents [hide] 1 Device Overview 1.1 Program Memory 1.2 Data Memory and Registers 1.3 EEPROM 1.4 Program Execution 1.5 Speed 2 Development 3 Features 4 Footnotes 5 See also 6 External Links 6.1 Atmel Official Links 6.2 AVR Forums & Discussion Groups 6.3 Machine Language Development 6.4 C Language Development 6.5 BASIC & Other AVR Languages 6.6 AVR Butterfly Specific 6.7 Other AVR Links [edit] Device Overview The AVR is a Harvard architecture machine with programs and data stored and addressed separately. Flash, EEPROM, and SRAM are all integrated onto a single die, removing the need for external memory (though still available on some devices). [edit] Program Memory Program instructions are stored in semi-permanent Flash memory. Each instruction for the AVR line is either 16 or 32 bits in length. The Flash memory is addressed using 16 bit word sizes. The size of the program memory is indicated in the naming of the device itself. For instance, the ATmega64x line has 64Kbytes of Flash. Almost all AVR devices are self-programmable. [edit] Data Memory and Registers The data address space consists of the register file, I/O registers, and SRAM. The AVRs have thirty-two single-byte registers and are classified as 8-bit RISC devices. The working registers are mapped in as the first thirty-two memory spaces (000016-001F16) followed by the 64 I/O registers (002016-005F16). The actual usable RAM starts after both these sections (address 006016). (Note that the I/O register space may be larger on some more extensive devices, in which case memory mapped I/O registers will occupy a portion of the SRAM.) Even though there are separate addressing schemes and optimized opcodes for register file and I/O register access, all can still be addressed and manipulated as if they were in SRAM. [edit] EEPROM Almost all devices have on-die EEPROM. This is most often used for long-term parameter storage to be retrieved even after cycling the power of the device. [edit] Program Execution Atmel's AVRs have a single level pipeline design. The next machine instruction is fetched as the current one is executing. Most instructions take just one or two clock cycles, making AVRs relatively fast among the eight-bit microcontrollers. The AVR family of processors were designed for the efficient execution of compiled C code. The AVR instruction set is more orthogonal than most eight-bit microcontrollers, however, it is not completely regular: Pointer registers X, Y, and Z have addressing capabilities that are different from each other. Register locations R0 to R15 have different addressing capabilities than register locations R16 to R31. I/O ports 0 to 31 have different addressing capabilities than I/O ports 32 to 63. CLR affects flags, while SER does not, even though they are complementary instructions. CLR set all bits to zero and SER sets them to one. (Note though, that neither CLR nor SER are native instructions. Instead CLR is syntactic sugar for [produces the same machine code as] EOR R,R while SER is syntactic sugar for LDI R,$FF. Math operations such as EOR modify flags while moves/loads/stores/branches such as LDI do not.) [edit] Speed The AVR line can normally support clock speeds from 0-16MHz, with some devices reaching 20MHz. Lower powered operation usually requires a reduced clock speed. All AVRs feature an on-chip oscillator, removing the need for external clocks or resonator circuitry. Because many operations on the AVR are single cycle, the AVR can achieve up to 1MIPS per MHz. [edit] Development AVRs have a large following due to the free and inexpensive development tools available, including reasonably priced development boards and free development software. The AVRs are marketed under various names that share the same basic core but with different peripheral and memory combinations. Some models (notably, the ATmega range) have additional instructions to make arithmetic faster. Compatibility amongst chips is fairly good. See external links for sites relating to AVR development. [edit] Features Current AVRs offer a wide range of features: RISC Core Running Many Single Cycle Instructions Multifunction, Bi-directional I/O Ports with Internal, Configurable Pull-up Resistors Multiple Internal Oscillators Internal, Self-Programmable Instruction Flash Memory up to 256K In-System Programmable using ICSP, JTAG, or High Voltage methods Optional Boot Code Section with Independent Lock Bits for Protection Internal Data EEPROM up to 4KB Internal SRAM up to 8K 8-Bit and 16-Bit Timers PWM Channels & dead time generator Lighting (PWM Specific) Controller models Dedicated IC Compatible Two-Wire Interface (TWI) Synchronous/Asynchronous Serial Peripherals (UART/USART) (As used with RS-232,RS-485, and more) Serial Peripheral Interface (SPI) CAN Controller Support USB Controller Support Proper High-speed hardware & Hub controller with embedded AVR. Also freely available low-speed (HID) software emulation Ethernet Controller Support Universal Serial Interface (USI) for Two or Three-Wire Synchronous Data Transfer Analog Comparators LCD Controller Support 10-Bit A/D Converters, with multiplex of up to 16 channels Brownout Detection Watchdog Timer (WDT) Low-voltage Devices Operating Down to 1.8v Multiple Power-Saving Sleep Modes picoPower Devices Atmel AVR assembler programming language Atmel AVR machine programming language