;***************************************************************************
;
; File Name :'xmodem.asm"
; Title :XMODEM only receive
; Date :2002.07.03.
; Version :1.0.0
; Support telephone :+36-70-333-4034, Old: +36-30-9541-658
; Support fax :
; Support Email :info@vfx.hu
; Target MCU :AT90S8515
;
;***************************************************************************
; D E S C R I P T I O N
;
;
;
;***************************************************************************
; M O D I F I C A T I O N H I S T O R Y
;
;
; rev. date who why
; ---- ---------- --- --------------------------------------------
; 0.01 2002.07.03 VFX Creation
;
;
;***************************************************************************
;Hardware
;***************************************************************************
;*
;* Kvarc: f=7.3728 MHz (T=135.63368 ns)
;*
;***************************************************************************
;
;
;
;***************************************************************************
;* Const Def
.EQU Xmodem_Sync = 0 ;szinkronizalasi fazis
.EQU Xmodem_SOH = 1 ;SOH byte-ra var
.EQU Xmodem_Fill = 2 ;SOH byte megjott, block init megvolt
.EQU Xmodem_Err = 3 ;megszakadt az atvitel, NAK kuldese 3 masodpercenkent
.EQU SyncTiming = 300 ;ket karakter elkuldese kozott
;eltelt ido szinc. uzemmodban 3sec @100Hz
;**************************************************************************
;* Hardware Def.
;
;***************************************************************************
;**** VARIABLES
.DSEG
CRC: .BYTE 2 ; CRC for XMODEM
XmodemFlag: .BYTE 1 ;Xmodem Flag
;[2:0] = 000 sending 'c' Phase 1: syncronize
Xm_BlkCounter: .BYTE 1 ;Xmodem Block Counter [00-FF]
XmodemPTR: .BYTE 1 ;Xmodem Buffer pointer
XmodemBuf: .BYTE 133 ;XMODEM RxBuffer
FileLength: .byte 4 ;File hossz 32 bites
LastPocketSize: .byte 1 ;utolso pocket merete byte-ban [0...128]
XmodemMode: .byte 1 ;Mode0 - Nul modem letolti de nem csinal semmit
;Mode1 - DSP Boot
Xm_ErrorCNT: .byte 1 ;Xmodem Time to Abort counter
;***************************************************************************
.ESEG
;***************************************************************************
.CSEG
;***************************************************************************
;** Init Xmodem File Receive
;**
Init_Xmodem: ldi R16,128
sts LastPocketSize,R16
clr R0
sts FileLength+0,R0
sts FileLength+1,R0
sts FileLength+2,R0
sts FileLength+3,R0
sts Xm_ErrorCNT,R0
sts XmodemFlag,R0
sts Xm_BlkCounter,R0
Init_XmNextBl: clr R0
sts CRC+0,R0
sts CRC+1,R0
sts XmodemPTR,R0
STS SCNT2+0,R0
STS SCNT2+1,R0
ret
;***************************************************************************
;** Calc & Update XMODEM CRC
;*
;* In: R0 - data byte
UpdateCRC: lds R17,CRC+1
mov R15,R17
swap R17
mov R16,R17
eor R17,R15
andi R17,0xF0
andi R16,0x0F
eor R15,R16
mov R14,R17
lsl R14
rol R16
eor R15, R14
eor R17,R16
lds R14,CRC+0
eor R15,R0
eor R17,R14
sts CRC+0,R15
sts CRC+1,R17
ret
;***************************************************************************
;** XMODEM Receive File & Block
;*
;*
Xmodem_Rec: lds R16,XmodemFlag
cpi R16,Xmodem_Sync
breq Xm_Sync
cpi R16,Xmodem_Fill
brne Xmodem_Rec1
rjmp Xm_Fill
Xmodem_Rec1: cpi R16,Xmodem_SOH
breq Xm_SOH
cpi R16,Xmodem_Err
breq Xm_Sync
rjmp Xmodem_Cancel
Xm_Sync: call Rs232GetByte
brcs Xm_valamijott
;itt meg mindig nem jott semmi
lds R16,SCNT2+0
lds R17,SCNT2+1
or R16,R17 ;Timer lejart?
breq Xm_Sync1
ret
Xm_Sync1: ldi R16,NAK ;akkor, ha hiba van NAK megy 3 masodpercenkent
lds R17,XmodemFlag
cpi R17,Xmodem_Err
breq Xm_Sync2
;mivel meg mindig nem jott semmi kuldunk egy
;CRC - karaktert 3 masodpercenkent
lds R16,Xm_ErrorCNT ;ha 20 'C' ideig nem jon semmi akkor abort!!!
inc R16
sts Xm_ErrorCNT,R16
cpi R16,20
brne Xm_Sync25
rjmp Xm_Abort
Xm_Sync25: ldi R16,'C'
Xm_Sync2: call SendChrW
ldi R16,Low(SyncTiming) ;Timer=3sec @100Hz
sts SCNT2+0,R16
ldi R17,High(SyncTiming)
sts SCNT2+1,R17
ret
Xm_SOH: call Rs232GetByte
brcs Xm_valamijott
ret
Xm_valamijott: mov R16,R0
cpi R16,CAN
breq Xmodem_Cancel
cpi R16,SOH
breq Xmodem_StartOfH
cpi R16,EOT
breq Xmodem_EndOfT
rjmp Xmodem_Rec
Xm_ByteStr: .db " Bytes received ",CR,0
;End of Trans == Canacel
Xmodem_EndOfT:
ldi R16,ACK
call SendChrW ;Pozitiv nyugta
Xm_Abort: ldi R16,CR
call SendChrW ;soremeles
lds R16,FileLength+0 ;ACC1 LSByte
lds R17,FileLength+1
lds R18,FileLength+2
lds R19,FileLength+3
call ULTOA ;Print FileLength
ldi XL,low(ASCIIBuf) ;Ascii Buffer Ptr
ldi XH,high(ASCIIBuf)
;ldi R22,12
call PrintASCII ;rcall DumpASCII
ldi R16,Low(Xm_ByteStr)
ldi R17,High(Xm_ByteStr)
call SendStrW
Xmodem_Cancel: lds R16,Term_Stat ;End of Xmodem receiving
cbr R16,Term_Rec_Xmodem ;Normal Terminal Mode
sts Term_Stat,R16
lds R17,XmodemMode
cpi R17,1
brne Xm_CancelEnd
;itt lesz vege a FALSH update-nak
Xm_CancelEnd: clr R17
sts Updating,R17 ;Ezel jelzzuk keszen vagyunk
sts XmodemMode,R17 ;barmi volt is, most null modem
jmp CMDOk
Xmodem_StartOfH:
ldi R16,Xmodem_Fill
sts XmodemFlag,R16
rcall Init_XmNextBl
ldi ZL,Low(SyncTiming) ;Timer=3sec @100Hz
sts SCNT2+0,ZL ;he nem jon ujjab byte, akkor baj van!!
ldi ZL,High(SyncTiming)
sts SCNT2+1,ZL
rjmp Xmodem_Rec
Xm_Fill: call Rs232GetByte ;itt beolvasunk 132 byte-ot
brcs Xm_data ; blk counter,255-blk counter [2 byte]
; adatblok [128 byte]
; CRC [2 byte]
;total 132 byte
lds R16,SCNT2+0 ;he nem jon ujjab byte, akkor baj van!!
lds R17,SCNT2+1
or R16,R17
brne Xm_vanido
ldi R16,Xmodem_Err
sts XmodemFlag,R16 ;Time Out, Ismetles kell
Xm_vanido: ret
Xm_data:
ldi ZL,Low(SyncTiming) ;Timer=3sec @100Hz
sts SCNT2+0,ZL ;he nem jon ujjab byte, akkor baj van!!
ldi ZL,High(SyncTiming)
sts SCNT2+1,ZL
ldi ZL,Low(XmodemBuf)
ldi ZH,High(XmodemBuf)
clr R1
lds R16,XmodemPTR
add ZL,R16
adc ZH,R1 ;ZL:ZH -> Xmodem Actualis Pos.
st Z,R0 ;Char eltarolasa
inc R16
sts XmodemPTR,R16
cpi R16,3 ;3
Programming the AVR Microcontrollers in Assember Machine Language
Atmel AVR From Wikipedia, the free encyclopedia (Redirected from Avr) Jump to: navigation, search The AVRs are a family
of RISC microcontrollers from Atmel. Their internal architecture was conceived by two students: Alf-Egil Bogen and Vegard
Wollan, at the Norwegian Institute of Technology (NTH] and further developed at Atmel Norway, a subsidiary founded by the
two architects. Atmel recently released the Atmel AVR32 line of microcontrollers. These are 32-bit RISC devices featuring
SIMD and DSP instructions, along with many additional features for audio and video processing, intended to compete with ARM
based processors. Note that the use of "AVR" in this article refers to the 8-bit RISC line of Atmel AVR Microcontrollers.
The acronym AVR has been reported to stand for Advanced Virtual RISC. It's also rumoured to stand for the company's founders:
Alf and Vegard, who are evasive when questioned about it. Contents [hide] 1 Device Overview 1.1 Program Memory 1.2 Data Memory
and Registers 1.3 EEPROM 1.4 Program Execution 1.5 Speed 2 Development 3 Features 4 Footnotes 5 See also 6 External Links
6.1 Atmel Official Links 6.2 AVR Forums & Discussion Groups 6.3 Machine Language Development 6.4 C Language Development
6.5 BASIC & Other AVR Languages 6.6 AVR Butterfly Specific 6.7 Other AVR Links [edit] Device Overview The AVR is a Harvard
architecture machine with programs and data stored and addressed separately. Flash, EEPROM, and SRAM are all integrated onto
a single die, removing the need for external memory (though still available on some devices). [edit] Program Memory Program
instructions are stored in semi-permanent Flash memory. Each instruction for the AVR line is either 16 or 32 bits in length.
The Flash memory is addressed using 16 bit word sizes. The size of the program memory is indicated in the naming of the device
itself. For instance, the ATmega64x line has 64Kbytes of Flash. Almost all AVR devices are self-programmable. [edit] Data
Memory and Registers The data address space consists of the register file, I/O registers, and SRAM. The AVRs have thirty-two
single-byte registers and are classified as 8-bit RISC devices. The working registers are mapped in as the first thirty-two
memory spaces (000016-001F16) followed by the 64 I/O registers (002016-005F16). The actual usable RAM starts after both these
sections (address 006016). (Note that the I/O register space may be larger on some more extensive devices, in which case memory
mapped I/O registers will occupy a portion of the SRAM.) Even though there are separate addressing schemes and optimized opcodes
for register file and I/O register access, all can still be addressed and manipulated as if they were in SRAM. [edit] EEPROM
Almost all devices have on-die EEPROM. This is most often used for long-term parameter storage to be retrieved even after
cycling the power of the device. [edit] Program Execution Atmel's AVRs have a single level pipeline design. The next machine
instruction is fetched as the current one is executing. Most instructions take just one or two clock cycles, making AVRs relatively
fast among the eight-bit microcontrollers. The AVR family of processors were designed for the efficient execution of compiled
C code. The AVR instruction set is more orthogonal than most eight-bit microcontrollers, however, it is not completely regular:
Pointer registers X, Y, and Z have addressing capabilities that are different from each other. Register locations R0 to R15
have different addressing capabilities than register locations R16 to R31. I/O ports 0 to 31 have different addressing capabilities
than I/O ports 32 to 63. CLR affects flags, while SER does not, even though they are complementary instructions. CLR set all
bits to zero and SER sets them to one. (Note though, that neither CLR nor SER are native instructions. Instead CLR is syntactic
sugar for [produces the same machine code as] EOR R,R while SER is syntactic sugar for LDI R,$FF. Math operations such as
EOR modify flags while moves/loads/stores/branches such as LDI do not.) [edit] Speed The AVR line can normally support clock
speeds from 0-16MHz, with some devices reaching 20MHz. Lower powered operation usually requires a reduced clock speed. All
AVRs feature an on-chip oscillator, removing the need for external clocks or resonator circuitry. Because many operations
on the AVR are single cycle, the AVR can achieve up to 1MIPS per MHz. [edit] Development AVRs have a large following due to
the free and inexpensive development tools available, including reasonably priced development boards and free development
software. The AVRs are marketed under various names that share the same basic core but with different peripheral and memory
combinations. Some models (notably, the ATmega range) have additional instructions to make arithmetic faster. Compatibility
amongst chips is fairly good. See external links for sites relating to AVR development. [edit] Features Current AVRs offer
a wide range of features: RISC Core Running Many Single Cycle Instructions Multifunction, Bi-directional I/O Ports with Internal,
Configurable Pull-up Resistors Multiple Internal Oscillators Internal, Self-Programmable Instruction Flash Memory up to 256K
In-System Programmable using ICSP, JTAG, or High Voltage methods Optional Boot Code Section with Independent Lock Bits for
Protection Internal Data EEPROM up to 4KB Internal SRAM up to 8K 8-Bit and 16-Bit Timers PWM Channels & dead time generator
Lighting (PWM Specific) Controller models Dedicated I²C Compatible Two-Wire Interface (TWI) Synchronous/Asynchronous Serial
Peripherals (UART/USART) (As used with RS-232,RS-485, and more) Serial Peripheral Interface (SPI) CAN Controller Support USB
Controller Support Proper High-speed hardware & Hub controller with embedded AVR. Also freely available low-speed (HID)
software emulation Ethernet Controller Support Universal Serial Interface (USI) for Two or Three-Wire Synchronous Data Transfer
Analog Comparators LCD Controller Support 10-Bit A/D Converters, with multiplex of up to 16 channels Brownout Detection Watchdog
Timer (WDT) Low-voltage Devices Operating Down to 1.8v Multiple Power-Saving Sleep Modes picoPower Devices
Atmel AVR assembler programming language
Atmel AVR machine programming language
Atmel AVR From Wikipedia, the free encyclopedia (Redirected from Avr) Jump to: navigation, search The AVRs are a family of
RISC microcontrollers from Atmel. Their internal architecture was conceived by two students: Alf-Egil Bogen and Vegard Wollan,
at the Norwegian Institute of Technology (NTH] and further developed at Atmel Norway, a subsidiary founded by the two architects.
Atmel recently released the Atmel AVR32 line of microcontrollers. These are 32-bit RISC devices featuring SIMD and DSP instructions,
along with many additional features for audio and video processing, intended to compete with ARM based processors. Note that
the use of "AVR" in this article refers to the 8-bit RISC line of Atmel AVR Microcontrollers. The acronym AVR has been reported
to stand for Advanced Virtual RISC. It's also rumoured to stand for the company's founders: Alf and Vegard, who are evasive
when questioned about it. Contents [hide] 1 Device Overview 1.1 Program Memory 1.2 Data Memory and Registers 1.3 EEPROM 1.4
Program Execution 1.5 Speed 2 Development 3 Features 4 Footnotes 5 See also 6 External Links 6.1 Atmel Official Links 6.2
AVR Forums & Discussion Groups 6.3 Machine Language Development 6.4 C Language Development 6.5 BASIC & Other AVR Languages
6.6 AVR Butterfly Specific 6.7 Other AVR Links [edit] Device Overview The AVR is a Harvard architecture machine with programs
and data stored and addressed separately. Flash, EEPROM, and SRAM are all integrated onto a single die, removing the need
for external memory (though still available on some devices). [edit] Program Memory Program instructions are stored in semi-permanent
Flash memory. Each instruction for the AVR line is either 16 or 32 bits in length. The Flash memory is addressed using 16
bit word sizes. The size of the program memory is indicated in the naming of the device itself. For instance, the ATmega64x
line has 64Kbytes of Flash. Almost all AVR devices are self-programmable. [edit] Data Memory and Registers The data address
space consists of the register file, I/O registers, and SRAM. The AVRs have thirty-two single-byte registers and are classified
as 8-bit RISC devices. The working registers are mapped in as the first thirty-two memory spaces (000016-001F16) followed
by the 64 I/O registers (002016-005F16). The actual usable RAM starts after both these sections (address 006016). (Note that
the I/O register space may be larger on some more extensive devices, in which case memory mapped I/O registers will occupy
a portion of the SRAM.) Even though there are separate addressing schemes and optimized opcodes for register file and I/O
register access, all can still be addressed and manipulated as if they were in SRAM. [edit] EEPROM Almost all devices have
on-die EEPROM. This is most often used for long-term parameter storage to be retrieved even after cycling the power of the
device. [edit] Program Execution Atmel's AVRs have a single level pipeline design. The next machine instruction is fetched
as the current one is executing. Most instructions take just one or two clock cycles, making AVRs relatively fast among the
eight-bit microcontrollers. The AVR family of processors were designed for the efficient execution of compiled C code. The
AVR instruction set is more orthogonal than most eight-bit microcontrollers, however, it is not completely regular: Pointer
registers X, Y, and Z have addressing capabilities that are different from each other. Register locations R0 to R15 have different
addressing capabilities than register locations R16 to R31. I/O ports 0 to 31 have different addressing capabilities than
I/O ports 32 to 63. CLR affects flags, while SER does not, even though they are complementary instructions. CLR set all bits
to zero and SER sets them to one. (Note though, that neither CLR nor SER are native instructions. Instead CLR is syntactic
sugar for [produces the same machine code as] EOR R,R while SER is syntactic sugar for LDI R,$FF. Math operations such as
EOR modify flags while moves/loads/stores/branches such as LDI do not.) [edit] Speed The AVR line can normally support clock
speeds from 0-16MHz, with some devices reaching 20MHz. Lower powered operation usually requires a reduced clock speed. All
AVRs feature an on-chip oscillator, removing the need for external clocks or resonator circuitry. Because many operations
on the AVR are single cycle, the AVR can achieve up to 1MIPS per MHz. [edit] Development AVRs have a large following due to
the free and inexpensive development tools available, including reasonably priced development boards and free development
software. The AVRs are marketed under various names that share the same basic core but with different peripheral and memory
combinations. Some models (notably, the ATmega range) have additional instructions to make arithmetic faster. Compatibility
amongst chips is fairly good. See external links for sites relating to AVR development. [edit] Features Current AVRs offer
a wide range of features: RISC Core Running Many Single Cycle Instructions Multifunction, Bi-directional I/O Ports with Internal,
Configurable Pull-up Resistors Multiple Internal Oscillators Internal, Self-Programmable Instruction Flash Memory up to 256K
In-System Programmable using ICSP, JTAG, or High Voltage methods Optional Boot Code Section with Independent Lock Bits for
Protection Internal Data EEPROM up to 4KB Internal SRAM up to 8K 8-Bit and 16-Bit Timers PWM Channels & dead time generator
Lighting (PWM Specific) Controller models Dedicated I²C Compatible Two-Wire Interface (TWI) Synchronous/Asynchronous Serial
Peripherals (UART/USART) (As used with RS-232,RS-485, and more) Serial Peripheral Interface (SPI) CAN Controller Support USB
Controller Support Proper High-speed hardware & Hub controller with embedded AVR. Also freely available low-speed (HID)
software emulation Ethernet Controller Support Universal Serial Interface (USI) for Two or Three-Wire Synchronous Data Transfer
Analog Comparators LCD Controller Support 10-Bit A/D Converters, with multiplex of up to 16 channels Brownout Detection Watchdog
Timer (WDT) Low-voltage Devices Operating Down to 1.8v Multiple Power-Saving Sleep Modes picoPower Devices
Atmel AVR assembler programming language
Atmel AVR machine programming language
Atmel AVR From Wikipedia, the free encyclopedia (Redirected from Avr) Jump to: navigation, search The AVRs are a family of
RISC microcontrollers from Atmel. Their internal architecture was conceived by two students: Alf-Egil Bogen and Vegard Wollan,
at the Norwegian Institute of Technology (NTH] and further developed at Atmel Norway, a subsidiary founded by the two architects.
Atmel recently released the Atmel AVR32 line of microcontrollers. These are 32-bit RISC devices featuring SIMD and DSP instructions,
along with many additional features for audio and video processing, intended to compete with ARM based processors. Note that
the use of "AVR" in this article refers to the 8-bit RISC line of Atmel AVR Microcontrollers. The acronym AVR has been reported
to stand for Advanced Virtual RISC. It's also rumoured to stand for the company's founders: Alf and Vegard, who are evasive
when questioned about it. Contents [hide] 1 Device Overview 1.1 Program Memory 1.2 Data Memory and Registers 1.3 EEPROM 1.4
Program Execution 1.5 Speed 2 Development 3 Features 4 Footnotes 5 See also 6 External Links 6.1 Atmel Official Links 6.2
AVR Forums & Discussion Groups 6.3 Machine Language Development 6.4 C Language Development 6.5 BASIC & Other AVR Languages
6.6 AVR Butterfly Specific 6.7 Other AVR Links [edit] Device Overview The AVR is a Harvard architecture machine with programs
and data stored and addressed separately. Flash, EEPROM, and SRAM are all integrated onto a single die, removing the need
for external memory (though still available on some devices). [edit] Program Memory Program instructions are stored in semi-permanent
Flash memory. Each instruction for the AVR line is either 16 or 32 bits in length. The Flash memory is addressed using 16
bit word sizes. The size of the program memory is indicated in the naming of the device itself. For instance, the ATmega64x
line has 64Kbytes of Flash. Almost all AVR devices are self-programmable. [edit] Data Memory and Registers The data address
space consists of the register file, I/O registers, and SRAM. The AVRs have thirty-two single-byte registers and are classified
as 8-bit RISC devices. The working registers are mapped in as the first thirty-two memory spaces (000016-001F16) followed
by the 64 I/O registers (002016-005F16). The actual usable RAM starts after both these sections (address 006016). (Note that
the I/O register space may be larger on some more extensive devices, in which case memory mapped I/O registers will occupy
a portion of the SRAM.) Even though there are separate addressing schemes and optimized opcodes for register file and I/O
register access, all can still be addressed and manipulated as if they were in SRAM. [edit] EEPROM Almost all devices have
on-die EEPROM. This is most often used for long-term parameter storage to be retrieved even after cycling the power of the
device. [edit] Program Execution Atmel's AVRs have a single level pipeline design. The next machine instruction is fetched
as the current one is executing. Most instructions take just one or two clock cycles, making AVRs relatively fast among the
eight-bit microcontrollers. The AVR family of processors were designed for the efficient execution of compiled C code. The
AVR instruction set is more orthogonal than most eight-bit microcontrollers, however, it is not completely regular: Pointer
registers X, Y, and Z have addressing capabilities that are different from each other. Register locations R0 to R15 have different
addressing capabilities than register locations R16 to R31. I/O ports 0 to 31 have different addressing capabilities than
I/O ports 32 to 63. CLR affects flags, while SER does not, even though they are complementary instructions. CLR set all bits
to zero and SER sets them to one. (Note though, that neither CLR nor SER are native instructions. Instead CLR is syntactic
sugar for [produces the same machine code as] EOR R,R while SER is syntactic sugar for LDI R,$FF. Math operations such as
EOR modify flags while moves/loads/stores/branches such as LDI do not.) [edit] Speed The AVR line can normally support clock
speeds from 0-16MHz, with some devices reaching 20MHz. Lower powered operation usually requires a reduced clock speed. All
AVRs feature an on-chip oscillator, removing the need for external clocks or resonator circuitry. Because many operations
on the AVR are single cycle, the AVR can achieve up to 1MIPS per MHz. [edit] Development AVRs have a large following due to
the free and inexpensive development tools available, including reasonably priced development boards and free development
software. The AVRs are marketed under various names that share the same basic core but with different peripheral and memory
combinations. Some models (notably, the ATmega range) have additional instructions to make arithmetic faster. Compatibility
amongst chips is fairly good. See external links for sites relating to AVR development. [edit] Features Current AVRs offer
a wide range of features: RISC Core Running Many Single Cycle Instructions Multifunction, Bi-directional I/O Ports with Internal,
Configurable Pull-up Resistors Multiple Internal Oscillators Internal, Self-Programmable Instruction Flash Memory up to 256K
In-System Programmable using ICSP, JTAG, or High Voltage methods Optional Boot Code Section with Independent Lock Bits for
Protection Internal Data EEPROM up to 4KB Internal SRAM up to 8K 8-Bit and 16-Bit Timers PWM Channels & dead time generator
Lighting (PWM Specific) Controller models Dedicated I²C Compatible Two-Wire Interface (TWI) Synchronous/Asynchronous Serial
Peripherals (UART/USART) (As used with RS-232,RS-485, and more) Serial Peripheral Interface (SPI) CAN Controller Support USB
Controller Support Proper High-speed hardware & Hub controller with embedded AVR. Also freely available low-speed (HID)
software emulation Ethernet Controller Support Universal Serial Interface (USI) for Two or Three-Wire Synchronous Data Transfer
Analog Comparators LCD Controller Support 10-Bit A/D Converters, with multiplex of up to 16 channels Brownout Detection Watchdog
Timer (WDT) Low-voltage Devices Operating Down to 1.8v Multiple Power-Saving Sleep Modes picoPower Devices
Atmel AVR assembler programming language
Atmel AVR machine programming language